CH341A I2C ignores clock stretching?

[jeremy0]

I'm using a CH341A module to interface to an I2C slave device based on the AtTiny85, driving the module from a Windows 10 machine using a version of the CH341PAR driver and library that I found online.
It works at the lowest speed (20kHz), but not at higher speeds.  (The CH341A works at higher speeds with other I2C devices.)
After much experimentation, I've concluded that the AtTiny85 is applying clock stretching - which the CH341 is ignoring and clocking out bits regardless.
(In short, if I advance or retard the timing of the point at which the slave releases SCL, it reveals correspondingly larger or smaller trailing portions of the CH341's SCL pulse(s), which it is evidently pumping out regardless of the slave holding SCL.)

So, my questions are:
(a) Is this known behaviour of the CH341A - or have I concluded wrongly?
(b) If so, is it due to the CH341A's I2C implementation itself, or to the Windows driver?
(c) If it's due to the driver, are there driver versions that support clock stretching?
(d) If it's the chip, is it hardwired behaviour, or is there a way to control it?

Many thanks!