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Common source amplifier and resistor values
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Frederico Acardi:
Hi. I want to design a Common Source Amplifier. I will be using an lnd_150 :
http://ww1.microchip.com/downloads/en/DeviceDoc/LND150-LND250-N-Channel-Depletion-Mode-DMOS-FETs-Data-Sheet-20005454A.pdf

I need to get the most gain out of the mosfet.
Yet, I don't understand how to choose the q-point for the lowest distortion (symetrical amplification) when you start from scratch with this circuit. What do I have to choose first ? Rd value, Id value, Gate voltage bias value ... ?

The only thing I know is VDD=320Vdc. The Input signal will be 1.74Vpeak +4dbu. The load is 470K.

And I have read "Allow 1/3VCC across Rd, Vds and R2".
I could allow 1/3 VDD=107V to the gate with a 3M//1M (R1//R2). But why 1 third ?
I am lost, can someone help me with a step by step how to do it, with real world numbers, not only formulas please.

I will use this circuit :


If you need more information I will add them.
Sorry for this but I am still learning and never took an electronic class.
Thank you.
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