I've built a 4 1/2 digit converter, going your route but one step at a time, I didn't saw the point starting a 5 1/2 without having the previous step... did missed the previous step, seems like grabbing a µC and a decent voltage reference and call it a day. I still had a few issues with it and never had the time to work on it or testing it further since I made it a few month ago.
For what I understand in that page what's trying to say is the higher the input capacitance and the source resistance, the higher it takes to settle, and what error would that make. If I read correctly, it's a single cycle converter, so if you multiplex the input it would do a valid conversion for the next sample. If you add more capacitance, that cap will take some time to charge, and what error that introduces. It doesn't mention the time which makes things confusing, this is what I understand by the settling time mention on the beginning of the page, reading the last to bits of the page 22 makes it more clear I guess.
Adding more capacitance would make the high frequency normal mode rejection greater, just filtering the noise, but it also would make the input of the converter take longer to settle. If you are interested that each sample is accurate you should minimize that settling time, otherwise the sample will be highly influenced by the signal before. I was making a mental exercise yesterday regarding of something similar, for this application (any measurement) longer time constants makes them have lower noise and could give better precision but if it takes too long to settle it becomes a problem. Having a smart timing for this would make a lot of sense, a fast settling when big changes occur, mid timing when smaller changes occur and long settling when the input remains in a small window. Having a µC makes sense to implement this in the digital domain, for that you should be aware of the aliasing which should be taken care before the conversion (in analog) and then just make what makes sense inside the µC.
JS