Constant Current Oscillation

[Stephen Hill]

So while following Dave's power supply series I have been designing my own power supply based on his ideas but altering it for my own needs. The design currently lives in LT Spice and I've come across a problem which I am unsure is normal behaviour or not.

Here is the schematic from LTSpice. This is a trimmed down version of the full version but still exhibits the problem (which I'll describe in a minute). As you can see we've got an LT3080 being supplied by 24V. VSET which sets the output of the LT3080. There is a 20ohm load and finally we have some current sensing and limiting circuitry in the bottom right... this is where the problem lies.


EEVBlog-Forum-Question-1st-March-2012-Schematic

Here is the output VOUT and the current over the load resistor R1. All nice and flat. No ripples (At least not any to worry about).


EEVBlog-Forum-Question-1st-March-2012-Normal

Now, here's the problem. When I start to limit the current via ISET, let's say to around 500mA, the current limiting circuitry starts to cause an awful amount of ripple. The ripple of the voltage is near as makes no difference 1V and  the current ripple is about 50mA (Sorry about the scale getting cut off).


EEVBlog-Forum-Question-1st-March-2012-Problem

Of course the answer to this would be to build the circuit and have a look at it on the oscilloscope. But I don't currently own one so I'm looking to those more experienced with these designs to ask is this is normal behaviour or is there is something wrong with the circuit or is it's something wrong with the simulation.

Many thanks in advance and if you need any further info, just ask

Cheers
Stephen

[TerminalJack505]

I'm no analog expert but I'm pretty sure you're going to need to add some compensation to your feedback loop.

You might be able to get away with simply placing a small capacitor (tens of pF) between IPULL and SET and/or between IPULL and U5's non-inverting input.

[Stephen Hill]

Thanks, I'll give those suggestions a try in an hour and get back to you - Just having my dinner.

Cheers
Stephen

[Stephen Hill]

Humm, none of those suggestions seem to be working?

Would it be worth while putting an RC filter at IPULL?

Cheers
Stephen

[PeteH]

Try the RC filter. You want to over-dampen that control loop so that (if anything) the current control will lag a bit. The RC filter should be below the bandwidth of the opamp you're using.

Op-amps will oscillate with capacitive loading as well. Can you read me the frequency of oscillation off?

[Rufus]

Humm, none of those suggestions seem to be working?

You can't just short the output of an op-amp to ground with a transistor. From Dave's Rev B design you removed R11. You also removed R12 and C2 which form a substantial low pass filter in the current and voltage control feedback loops.

You also can't just drive the base of a transistor with an op-amp it introduces a large additional gain, you removed R13 from the Rev 2 design.

[Stephen Hill]

With the circuit as above the oscillation of constant current circuit is 224KHz. For reference the frequency bandwidth of the op amps are 25MHz with a slew rate of 50V/us.

Adding an RC filter doesn't help either.

Could it simply be that LTSpice is simulating this circuit poorly?

Cheers
Stephen

[Rufus]

Could it simply be that LTSpice is simulating this circuit poorly?

Funny, the chance that a circuit works correctly when simulated but doesn't work in real life is orders of magnitude higher than the chance of a circuit which doesn't work when simulated but does work in real life.

I told you some of what is wrong with your circuit. Leaving out the bits you don't understand is not "altering it for my own needs" unless you need it not to work.

[Stephen Hill]

Humm, none of those suggestions seem to be working?

You can't just short the output of an op-amp to ground with a transistor. From Dave's Rev B design you removed R11. You also removed R12 and C2 which form a substantial low pass filter in the current and voltage control feedback loops.

You also can't just drive the base of a transistor with an op-amp it introduces a large additional gain, you removed R13 from the Rev 2 design.

Wow. Adding those components fixed the problem. You have a good eye for detail I must have missed those components for some reason.

Many many thanks

[Stephen Hill]

Could it simply be that LTSpice is simulating this circuit poorly?

Funny, the chance that a circuit works correctly when simulated but doesn't work in real life is orders of magnitude higher than the chance of a circuit which doesn't work when simulated but does work in real life.

I told you some of what is wrong with your circuit. Leaving out the bits you don't understand is not "altering it for my own needs" unless you need it not to work.

I really appreciate your help and attention to detail. But as someone who is still learning electronics in their spare time, I don't appreciate the sarcasm. They were simply components I missed and didn't revisit the schematic as I should have done.

Thanks
Stephen

[amspire]

The addition of Q1 is adding a lot of loop gain to the current control circuit - I would expect it to be unstable.  Just as a test, replace Q1 with a PNP transistor with the collector to ground and the emitter to the LT3080. I am not suggesting it as a final solution, but it will probably be more stable.

If it were me, I just wouldn't be using the LT3080 if I needed to put the current sense resistor after the regulator. I would go back to a more usual series pass supply with voltage sense leads after the current sense resistor.

Also Dave has particular reasons for running his supply of a single supply, but if there is any chance of having a negative supply for the regulator circuit you always want to do it. If you have a mains transformer, you can always have a negative supply with just a few cheap diodes and capacitors. You end up with a supply that works perfectly down to 0 volts, and you will have a lot more options to get rid of the high gain Q1 transistor.

Richard.

[IanB]

Others have answered your question, but the lower left corner of your schematic is fundamentally screwy, as mentioned by Rufus.

You have an op amp that is going to do everything possible to maintain its output at the required voltage. And then you a transistor (Q1) that is trying to subvert the purpose of the op amp by changing its output to the wrong value. So you've just set up a battle between competing interests--may the strongest player win. This is not going to work out well.

Instead of setting up a fight between opponents, you need to arrange for a cooperative interaction between partners.

as someone who is still learning electronics in their spare time, I don't appreciate the sarcasm

That wasn't sarcasm. It was a simple statement of truth that is good to understand:

• If a circuit fails to work as intended when simulated, there is almost no chance it will work correctly when built.
• If a circuit does work when you simulate it, there is no guarantee it will work equally well when you build it.

In other words if your circuit is oscillating when you simulate it, your circuit has something wrong with it. Guaranteed.

[Bored@Work]

I really appreciate your help and attention to detail. But as someone who is still learning electronics in their spare time, I don't appreciate the sarcasm.

You actually got the soft version, from someone who trusts simulations to a large extend. My statement would have been much harder. Reality always trumps the simulation, and you don't know much until you have build the circuit.

Second, playing with a simulation is not in any way doing a proper design. SPICE is for analyzing, not synthesizing (designing) a circuit. Designing a circuit requires to understand principles, the components, and *shock horror* doing some calculations upfront.

Third, doing a try-and-error design using SPICE for the "try" part is a gamble. SPICE models aren't perfect, and "optimizing" a circuit in SPICE is often a recipe for disaster. E.g. you can figure out the perfect resistor value in a SPICE circuit to compensate for some offset. In reality you won't get that resistor value, and even if you would, the offset you need to compensate is likely different, because the real components show other offsets, and it isn't even constant from component to component of the same type.

[tecman]

As stated your circuit has several problems.  The op-amp (lower right) is operating without any feedback, so it is basically a comparitor.  You will for sure oscillate in this configuration.  You are also feeding the output of that op-amp directly into the base of Q1.  This is another high gain configuration.  Lastly you have the op amp, lower left, feeding SET but also it can be clamped by Q1.  In the right conditions Q1 can effectively short the op-amps output to ground.  No an advisable way of operating.  You can simply add a resistor to the output of the op-amp to limit the current to a safe, recommended value.

On the other op-amp, a resistor from the op-amp to the transistor base will tame the gain in that connection.  The op-amp itself need to be operated in a linear manner, so defining a known gain is needed.  Also you will likely need some compensation in that stage.  Phase addition of the various stages and the high gains you have will almost guarantee oscillation.  You actually will be better off using a slower op-amp instead of the 1215.  Compensation will still be needed in all likelihood. 

Lastly I did not look up the specs, but you are powering the op-amps from 15 volts.  This will likely limit the op-amps input to a 15 volt max value.  If the output of the regulator gets close to 15 volts (current source, light load) the circuit function will become unpredictable. 



paul

[Rufus]

As stated your circuit has several problems.  The op-amp (lower right) is operating without any feedback, so it is basically a comparitor.

It has feedback in current limit mode around the whole regulator control and current sense loop. A very dominant pole in the loop (100R and 10uF) from Dave's design was omitted.