Multi-channel lowest value detection

[Kestis]

I have some electronics knowhow but I'm absolute beginner when it comes to analog signals and signal processing.
How could I detect lowest value on multiple channels? The number of channels is not certain yet but it will probably be between 50 and 100.
Sample rate should be at least 200 kHz and 10 bit resolution.

I need some guidance on what's a feasible way to implement this.
Detection of lowest value in software or hardware? A few fast MCUs each handling a group of channels? FPGA? Internal or discrete ADCs?

[MasterT]

200k x 50/100 = 10/20 MHz. Some stm32f- M4 have 18 Msps using 3 internal adc. So direct approach is MUX -> nuclea board.

What kind of data is that? Seems, it's not necessary to measure all channels, anything not lowest may be discarded? If so, comparator may be implemented in some kind of "compression" data flow, but it would be lossy compression, and depends how many "lowest" samples could be lost during readjustment comparator settings.

[jbb]

Hmm.   There are a few analog and digital methods that might apply here.

Four questions come to mind:

• What are your analog signals? (Voltage/current, bandwidth etc.)
• Do you need a product, a lab setup or a proof of concept?
• Is power consumption a major concern?

[li]Are you really sure that all you want is minimum detection?  Do you need to know which channel?  Will someone else say "you know, it would be nice to know the maximum as well"?
[/li][/list]

[RandallMcRee]

Noise is your enemy. I have found that getting good precision from a DAC requires some sort of averaging, smoothing, whatever you want to call it.

If two of your channels are close together in magnitude you will get erroneous readings as to which is the minimum if you do not do some sort of signal processing. How sophisticated this is, is up to you. But even with 10 bit resolution you can easily get two or more channels flipping the minimum back and forth.

Just another pitfall to mention. Probably not the most important one, but, hey, you did not provide much info....

Randall

[radioactive]

How could I detect lowest value on multiple channels? The number of channels is not certain yet but it will probably be between 50 and 100.
Sample rate should be at least 200 kHz and 10 bit resolution.

If I understand correctly,  you want to split a 100kHz/200kHz channel up into somewhere between 50 and 100 channels.  I would suggest going with pretty much any Cortex M4, M7 MCU.  The A/D converters should all be able of handling this and the DSP instructions on these parts can be utilized to speed up transform related operations such as FIR filters and FFT.  In your case, assuming real input data,  you probably want to perform either a 128 bin FFT or 256 bin so that you will end up with either 64 or 128 bins to search for the minimum signal.  I think the CMSIS DSP examples even have some code either looking for the max or min bin. 

Here is an example
http://www.keil.com/pack/doc/CMSIS/DSP/html/group__FrequencyBin.html

If you actually do mean 50 to 100 channels that are 200 kHz wide each, then you need a high-speed ADC and FPGA with enough cells to fit an FFT in there.

[Kestis]

Here is more information:
-Channels are divided into four equally sized groups.
-Voltage signal
-Every channel needs to be sampled at least 200kHz

I need to find lowest value within each group and on which channel was it. Values of the two channels right next to the lowest one must also be known.

I think that it would be best to get lowest value for every channel and process the results afterwards. There is no need to know the lowest one of the channels in real time. It can be figured out after the measurement is over.

[radioactive]

I think it would help if you could provide more details on what your project is.  Sounds like you need to select between various channels from 4 separate groups.  How are the channels accessed?  Switching mechanisms?  Are the channels on separate transmission lines or single transmission line and separated by carrier frequency?