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Critique my first PCB
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carl0s:

--- Quote from: ANTALIFE on May 20, 2018, 02:14:31 pm ---
--- Quote from: carl0s on May 20, 2018, 09:56:46 am ---
--- Quote from: ANTALIFE on May 20, 2018, 06:03:06 am ---My first though is that it looks like you have a switching DCDC converter, not sure of the current/power requirements but if it was me I would try connect each component that is part of the power path with a thicker track or a plane like this:

--- End quote ---

Yes I thought that might come up. I'm just not quite sure how to do it in Altium other than by literally drawing the polygons, and I can see them ending up rather ugly :-)
I might have a go though.

It's an AP5724 DC to DC converter. http://www.internetsomething.com/lcd/AP5724%20backlight%20driver.pdf

There's 6 LEDs in series, at 20mA, 18v total, so 360mw total. They say the above driver chip is 84% efficient, so expected draw of 430mw. Call it 500mw. I'm not really sure I know enough about this stuff, but I gather it's current that matters. So the 500mw should pull 151mA from the 3.3v supply. I've used 10 mil traces which an online calculator says should be good for 450mA with 1oz copper. The LCD panel itself pulls 15mA. So I'm at about 165mA.

What do you think? I suppose it makes sense for me to learn how to do the job properly though doesn't it..

--- End quote ---

The way I see it if the LED's expect to consume 360mW and the converter is 84% efficient then this means 70mW will be dissipated as heat in the SOT23-6 package. Given that θJA is 162°C/W this means that IC will rise by ~11°C above ambient. Not that bad but for the sake of it I would still use a polygon to help dissipate the heat, and give the current a much less resistance pathway (lower ohmic loss, not that it matters that much with your current draw).

As for polygons you can either manually place them down and adjust as you go like:
Or you could use another layer (like MECH 1) to define the shape and then create a polygon on copper layer, like (Create Polygon from Selected Primitives): https://www.altium.com/documentation/15.1/display/ADES/PCB_Cmd-ConvertSelected((ConvertSelected))_AD

Also I think your latest iteration with polygons looks better, but there is still room for improvement. To get an idea of a good layout have a look at the appnote:
https://www.diodes.com/diodes-part-files/AC/AP5724/User%20Guides%20and%20EV%20Boards/AP5724-EVM.pdf
Notice how all components part of the power path (inductor, diode, filter caps, IC...) are all connected via a large polygon

--- End quote ---

Thank you. I didn't think of dissipating heat with pads/polygon.

The reason my +3.3v polygon doesn't continue through the diode is because the LED driver datasheet specifically says to minimise trace width here.

However, I may be misunderstanding. Perhaps it's just the trace from the diode to the IC that needs to be minimised, and maybe I should still have a fat trace (polygon) from the inductor to the diode.. but then.. isn't the effect the same?

carl0s:

--- Quote from: Dave on May 20, 2018, 04:42:19 pm ---The current paths in that SMPS look unnecessarily long. You want the high currents to have short, uninterrupted current paths from the input capacitors to the output capacitors.
You could improve this by rotating the inductor by 90° clockwise and move those input capacitors closer to the output caps. Also, fatten the traces up around the diode.

--- End quote ---

I'm not clear on how to do that :-/

What about moving output capacitor C4 up top by the LCD socket? Would that be an improvement?
ANTALIFE:
I think they mean trace area going into SW pin, if you have a look at reference design they still have a wide traces for all components it's only when they funnel into the IC that they become smaller (design constraint of pin positions).

Also Dave made a good point. Think of a transient happening on the Vout and suddenly you must supply additional current to get the voltage back up, how you have C4 positioned makes it harder for the circuit to respond faster.
carl0s:

--- Quote from: ANTALIFE on May 20, 2018, 11:32:48 pm ---I think they mean trace area going into SW pin, if you have a look at reference design they still have a wide traces for all components it's only when they funnel into the IC that they become smaller (design constraint of pin positions).

Also Dave made a good point. Think of a transient happening on the Vout and suddenly you must supply additional current to get the voltage back up, how you have C4 positioned makes it harder for the circuit to respond faster.

--- End quote ---

I hear ya. I did think that C4 might need moving closer to the LED backlight. I just wasn't sure about moving the other caps or re-orienting the inductor... too much brain power required at this stage!

The whole thing is super tiny mind you - if that makes a difference. In fact I forgot how small it was, and I have just spent ages lengthening the pads on the small LCD connector at the top so that I have a better chance of soldering it.



Here's the latest iteration/changes then.. Hopefully it'll do the job. I forgot to re-apply teardrops, but I'll do that later.





carl0s:
Any better? : C4 only has that one 12mil via to ground. Do you think that's a problem? I suppose I could simply make it a bigger via. Otherwise, if it matters, I'd have to look to get the ground pour to reach around.







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