Author Topic: PCB layout - gate drives and star ground?  (Read 11724 times)

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Offline ArtlavTopic starter

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PCB layout - gate drives and star ground?
« on: April 13, 2014, 07:40:23 pm »
Hi.

I'm making a 12 VDC -> 310 VDC converter as a hobby project, and i came across some questions on the PCB layout.
It's a push-pull converter with a transformer, up to 100W.
The layout is attached below.

Star ground is something that keeps the switching noise of the main FETs from interfering with the logic circuitry, right?
The idea is to connect the grounds at a single point upstream.

However, the gates are to be driven, and this way the return path for the gate drive will go all the way back around the entire board.
But if i connect them directly, then that seems to defeat the whole idea of having a star ground.
Second loop is the feedback, which takes it's ground all the way back from the output, even further away.

The question is - are either of these a problem?
How are these normally laid out?
Would it even make sense to have star ground in such a design?
 

Online nctnico

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Re: PCB layout - gate drives and star ground?
« Reply #1 on: April 13, 2014, 08:01:15 pm »
I'd try to put the mosfets closer to the driver chip. Besides that the traces look a bit thin. 100W at 12V is 8A not including losses.
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Offline c4757p

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Re: PCB layout - gate drives and star ground?
« Reply #2 on: April 13, 2014, 08:18:08 pm »
Um... exactly how much power do you think you're going to get out of that transformer? ??? Did you read the datasheet?
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Offline lewis

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Re: PCB layout - gate drives and star ground?
« Reply #3 on: April 13, 2014, 08:19:33 pm »
The gate driver and the MOSFET sources must NOT go back to the star ground. They should be as short as possible.

Consider what happens when the gate driver turns on (see image). The MOSFET is a big capacitor between gate and source, which needs an enormous current to charge up. (Forget this crap about mosfet gates taking no current, they do!). The gate current flows from C1, through the gate driver chip, through the gate resistor, into the mosfet gate, out of the source, and back into the arse end of C1.

When the mosfet turns off, the gate driver now needs to discharge that enormous capacitance we just charged up on the on cycle. This requires more high currents. This time the current flows from the gate, through the gate driver chip, out through the ground pin and into the mosfet source.

Both of these current flows are loops. You can see on the image (I've drawn them in blue) they look like circles. These loops need to be as small as possible, both in length and in diameter. In other words, make the area of the loop as small as possible, as near to zero as you can. Minimising length decreases inductance and reduces ringing on the gate drive pulses, and minimising area reduced EMI and ensures your converter does not perform like a radio transmitter. Creating a tight local ground ensures noise will not bleed into your ground causing ground bounce.

In other words, do NOT return all the grounds to the star ground. You need to make a very tight local loop between the FET sources, gate driver and C1 to ensure your converter works well. (C1 is often overlooked and needs to be very close to the gate driver. Use a high quality X7R dielectric)
« Last Edit: April 13, 2014, 10:24:48 pm by lewis »
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Online T3sl4co1l

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Re: PCB layout - gate drives and star ground?
« Reply #4 on: April 13, 2014, 09:37:57 pm »
It's a bomb anyway.  The feedback will probably oscillate, and there's no series choke between the transistors and output capacitor.  Well, soft start may allow it to survive long enough to start up, so there's that.

Actually no, it's not a bomb, it's a toaster oven.  The transformer (if it is as specified) will burn as much as it transforms, meanwhile unclamped, unsnubbed avalanche will toast the transistors.  And if that doesn't go first, an incorrect setting on the FREQ pot might just toast the controller before anything appears at the output.

Is the gate driver really a one-side inverting type?  Or is it both?  The pin labels aren't even consistent, and a part number is not specified.

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Offline ArtlavTopic starter

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Re: PCB layout - gate drives and star ground?
« Reply #5 on: April 13, 2014, 10:17:23 pm »
Is the gate driver really a one-side inverting type?  Or is it both?  The pin labels aren't even consistent, and a part number is not specified.
Um... exactly how much power do you think you're going to get out of that transformer? ??? Did you read the datasheet?
Sorry about the schematic - as often happens with Eagle, it's the size/pinout that matters, not actual part names.

The transformer is a custom-wound ferrite one, more or less designed for the job.
The FETs are IRFZ44N.
The driver is TC4427 dual non-inverting.
The power traces will have copper strings inside of them.

The gate driver and the MOSFET sources must NOT go back to the star ground. They should be as short as possible.
So, basically just link the driver chip's ground directly to mosfet's sources?
Having this loop tight is more important than whatever switching noise can come out of the additional ground links?

What i'm basically can't figure out is what does and does not matter, and how much - keeping the grounds separate, keeping the loops tight, something else. I have no formal EE education, and kind of trying to reconcile contradicting recommendations and guidelines by trial and error.

It's a bomb anyway.  The feedback will probably oscillate, and there's no series choke between the transistors and output capacitor.  Well, soft start may allow it to survive long enough to start up, so there's that.
Series choke where and of what size?
There shouldn't be any connection between the transistors and the output, unless you mean the ground.

Btw, two previous iterations of this circuit worked just fine, and looked quite a bit worse.
So, i don't think it's likely that it would just blow up at once.
 

Online T3sl4co1l

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Re: PCB layout - gate drives and star ground?
« Reply #6 on: April 13, 2014, 11:51:43 pm »
The instant a transistor turns on, it applies 12V to the transformer, which appears on the secondary, which gets dumped right into a capacitor.  So, the transistor is shorted into a capacitor.

If the pulse width comes up slowly, the leakage inductance of the transformer (depending on design) will reduce peak current as the capacitor charges, until once it gets up to full duty cycle, even if the load is heavy, one pair of rectifier diodes is almost always conducting and the likelihood of large peaks disappears.

At this point, the regulation is shit, but in an application where that doesn't matter, the error amp is simply shunted to deliver full duty cycle.  This is typical of the DC-DC converter in almost every automotive power amplifier over 50W.  Just because they use it, doesn't mean it's any good.  What it is, is cheap, and that's all they care about, not reliability, not regulation, not safety (isolation or current limiting).

Attempting to regulate output voltage with PWM will result in instability (likely necessitating a long time constant) as the duty cycle required to deliver some voltage and current will be small and dependent on the transformer's leakage.  All the power that doesn't go into the output goes into avalanching the transistors, cooking them quickly.  The efficiency will also be crap, even discounting the avalanche losses.

A series inductor, on the primary or secondary side, is used to soften the blow, analogous to having the transistors punching bouncy rubber springs rather than brick walls.  If you put it on the primary, you need a current mode inverter and a current source supply, so better to put it on the secondary while controlling the current delivered (the PWM controller should regulate current, with voltage regulated externally as a second step).

This is what a choke input filter looks like,



but the current limit (a shunt resistor in the ground return of the transistors) is pretty shitty: it will work to protect it from overload, but it won't be particularly stable or sharp (the current output will continue to rise as voltage falls, rather than hitting a solid constant current limit).  If the output winding is ground referenced, rather than stacked on top of the supply, then that can be used for current feedback, and it will yield a solid current limit.

This circuit also shows voltage mode feedback, which is bad.  Current mode feedback is preferred.  The TL494 contains two error amps, but since they are tied together, a two-loop solution is not possible alone, and another op-amp is required.  Fortunately, this can also be a voltage reference, like a TL431, making this approach easy to apply for isolated circuits.

Tim
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Offline free_electron

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Re: PCB layout - gate drives and star ground?
« Reply #7 on: April 14, 2014, 01:28:04 am »

Star ground is something that keeps the switching noise of the main FETs from interfering with the logic circuitry, right?

no it is not. it is a common reference point. the sum of all currents in a star is zero
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Offline Richard Head

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Re: PCB layout - gate drives and star ground?
« Reply #8 on: April 14, 2014, 08:11:14 am »
Artlav

T3sl4co1l and Lewis are quite correct.
It seems to me that you don't grasp the fundamentals of switchmode power supplies. There are plenty of excellent books that cover the subject and undoubtedly on-line also.
The reason I say that is that the output inductor (which you have omitted) is an integral part of a basic PWM converter. It's not a "nice-to-have element", it's essential.
It acts as an energy storage element when the power switches are off. The energy stored in the inductor releases gradually into the output capacitor and load while the MOSFET's are both off.
The inductor value, among other things, determines the ripple current in the output capacitors.
It's value is one of the first values that are calculated in the design process.
The value is dependant on the operating frequency and the amount of ripple current desired. (Generally 15-30%)
From a layout point of view the other posters have pretty much covered it.
The large electrolytic bypass capacitor should be right up close to the power transformer. Move the fuse to before the input cap. Also, don't place the cap too close to the heatsink or power transformer due to heating. The life of a PSU is generally determined by the electrolytic capacitor lifetime which follows the Ahrrenius equation (basically). Every 11 deg C increase in cap temp halves the capacitor lifetime. Also, the capacitor ground connection should not go straight to the groundplane, but to the lower MOSFET source. The MOSFET source is the "star" point.
To drive the point home, remember that the finite source inductance creates a voltage drop with steep di/dt's. For example, if the MOSFET interupts a current of 10A in 50ns and the source inductance is 50nH (50mm track length) there will be a difference in voltage of 10V (v(t)=Ldi/dt) between source and ground. This voltage causes the gate voltage to vary by the same amount so the device doesn't know whether to switch on or off!
However, I think it's vital that young designers make mistakes early on so that they learn! If you never make a mistake you never learn. However, some people, it seems never learn from their mistakes!

Dick
 

Offline ArtlavTopic starter

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Re: PCB layout - gate drives and star ground?
« Reply #9 on: April 14, 2014, 12:21:52 pm »
Ok, to sum it up.

-Star ground makes sense, but it's point is not the input, as i thought, but some meaningful location, in this case - FET sources.
-The smaller the loops, the better.
-Output inductor is not optional.
-Just because it works, doesn't mean it's any good.

So, i've rearranged things as shown below.
The second attachment highlights the loops as i understand them.

Did i read where the loops are right?
Is this revision any good?

I'm quite uncertain what can be done with the feedback, if anything.
 

Offline Richard Head

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Re: PCB layout - gate drives and star ground?
« Reply #10 on: April 14, 2014, 02:35:03 pm »
Artlav
Better, but still a few issues.
Try to run the gate drive feed and return traces of each MOSFET on top of each other if possible. It seems like in your layout it is very easy to do. The traces one above the other tend to cause flux cancellation so the series trace inductance drops considerably. I would have located the driver closer to the power devices but it should work fine as is.
The ground conection that goes to the TL431 circuitry should ideally be seperate from the source of Q2. This is to avoid Ldi/dt jumps during MOSFET turn on and off. Try to connect directly to the ground plane rather than midway along the source trace. I'm being a little anal here but it's easy to do on your layout.
Incidently, switchmodes can be successfully implimented on single sided board if carefull thought is applied during the layout. It is much easier and better with a double sided board though.

Dick
 

Offline free_electron

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Re: PCB layout - gate drives and star ground?
« Reply #11 on: April 14, 2014, 03:25:31 pm »
The layout plain stinks. Sorry to be blunt.

There are other issues besides the layout.
There is no 2 pin trimpot
Why a 4 diode bridge ? You tie the output ground to the i put ground anyway. Single ended is fine.

The 1 meg resistor for feedback is too short body for the 300 volt you make. You need long body safety resistors or two or three resistors in series.
You need a fixed resistor in parallel with the trimmer. If the trimmer wiper breaks contact during timming, the feedback node will see the full 300 volts. This may destroy the chip due to overvoltage. A fixed parallel resistor limits this voltage. Other solution is to put a diode from fb to vcc.

Post your schematic. There are problems with it.

What is your switching frequency ? What currents ? What duty cycles ? What does the waveform look like at the output of the transformer under load ?  You may need different geometry capacitors to accomodate pulsed currents.

Switchers are not an easy matter.
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