Current sink/DC Load control circuit

[SebastianH]

Hey all,

I'm working on a DC load (150V; 0-10A; wattage still tbd, somewhere between 60W and 200W, should be scaleable relatively easy).

Power Stage
For the Power stage I'd like to go with a circuit that is very similar to what can be found in commercial DC loads: a couple of IRFP250N, each controlled individually by a reasonably fast opamp (e. g. LM7322, NE5532) using balancing resistors.

--> MOSFET_control.png

This circuit by itself works respectably well in this simple simulation
+ Good step response for changes of the setpoint
+ Good step response for changes of the load
- Poor DC performance (obviously), unusably bad at very low currents
- With no load connected U1 saturates, which is a huge problem when (re-)connecting a load while the output is on
- High dV/dt at the input terminals can be a problem (capacitive voltage divider of Cgs and Cgd), especially in rather theoretical scenarios (but still). D1 certainly does help, but the current flow through D1 into the opamp can get quite substantial. Limiting the output voltage to 10V via an appropriate feedback network would help a lot, especially in combination with a zener diode between gate and source. That might also be overkill for practical use cases.

As a side note: I saw some people connecting the negative input of the MOSFET-opamp to GND or +15V respectively via a (sometimes rather large) resistor in similar applications. Connecting it to GND would change the closed loop gain (ok, if you need that). From what I understand, connecting it to +15V would result in a certain offset that the outer current controller would compensate for in normal operation. This would (for example) allow the “upstream” control circuit to keep the MOSFET off, even if the opamp has a positive offset and the output of the "upstream" control is limited to positive voltages. Is there anything more to it?

Control Circuit
I address the DC problem with a fairly simple current control loop with a few precision opamps to control the total current of all MOSFETs.

--> Current_Control.png

As soon as the controller is in a valid operating point, it works nicely (simulation):
+ Good step response for changes of the setpoint
+ Good step response for changes of the load
+ Very decent DC performance (the simulation results at least would be good enough for me)

Two main problems
1. The aforementioned saturation with no load connected.
One idea would be to implement a second controller and limit how far the voltage across the input may drop. And then connect both controllers like so:

--> TwoControllers.png

I’m not sure whether this actually works. The “min voltage control” would have to transition to current control slow enough for the current controller to reduce its output accordingly.
So I’d like to ask for advice regarding:
•   Whether this is a reasonable idea
•   Whether there are other ways to implement this

2.   Generally a massive overshoot for any current setpoint step starting at 0A („off“). The reason is quite obvious: The opamp drives all the gate to the negative rail (without D2) or one forward voltage drop below GND (with D2) to achieve 0A at the output. And right now I have no idea how to design a controller that can recover from the „off“ state reliably and quickly without a ton of overshot, especially for rather small currents – the transconductance curve of the circuit is extremely steep in this region.
Any suggestions are appreciated. Btw: If that is possible I would like to keep the inner control loop relative close to the one shown above.
Furthermore: If someone has access to a professional DC load: I would really be interested in the step response, both the transition from output „off“ to „on“ with the load connected, as well as with the output „on“ and a load being connected.

Thanks,
Sebastian


Btw: I'm too stupid to insert a link the attached images 

[MarkF]

I had some discussions on the subject of saturation in NO-Load situations, but never spent the time to add a whole other level of complexity to control it.  I took a minimal approach since my PCB was designed and built.  What I did was add a resistor (shown in red) such that it added enough current across the sense resistor, when the control was set to have minimal current, where the op-amp would turn off the MOSFET.  Not pretty but works in one very specific use case.   I can therefore turn the desired current to Off/Minimal and the MOSFET OFF when no load connected.  The circuit will saturate if you even slightly turn up the desired current point.

[MarkF]

My process is:
  - Turn the current select to 'off'
  - Connect the load
  - Turn the current up to the desired level

No saturation, no over-shoot.


Note:
  My selection of resistors to the MOSFET gate and op-amp feedback loop was 're-use' of values already in the circuit.
Better selections would be 100 Ω to MOSFET gate and 2.2K Ω in the feedback loop.  The high values I used also protect the op-amp if the MOSFET fails.  Because the MOSFET normally fails shorted and puts high voltage onto the op-amp.  The higher resistor values limit the current and may possibly save the op-amp.  ( Haven't killed yet to find out.)

[SebastianH]

Thanks for your quick reply 

Do you use the "outer" current control loop?

Since I plan to have multiple MOSFETs in parallel I want to use a common current shunt, which -in turn- means that I have to implement the current control loop.
And then the trouble starts 

The resistor could help without the control loop, but: The outer control loop will sense a current smaller than the setpoint and then the opamp will still go into saturation.
Without the outer loop I don't see any overshoot either, but at the same time it seems to be virtually impossible to set the current to precisely 1mA with a 12 to 16 bit DAC, especially with mulitple FETs in parallel. On the other hand, the outer control loop manages that very easily, as soon as it is in a normal operating point.

Using a larger Gate resistor could help a bit, but at the same time would make the current control much more slowly and more prone to MOSFET self turn on. Maybe 100 Ohms would be ok for this particular FET regarding self-turn on, but the transient response would be certainly much worse, because a dV/dt between Drain and Source would mean an increased effect on the Gate voltage.

So I'd much prefer a solution with a rather low Gate resistance/as low as I can get without instability issues.

[MarkF]

Thanks for your quick reply 

Do you use the "outer" current control loop?

Since I plan to have multiple MOSFETs in parallel I want to use a common current shunt, which -in turn- means that I have to implement the current control loop.
And then the trouble starts 

I only have the one MOSFET.  My load is limited to 2.5A @ 25V.

I would have multiple sense resistors.
I would have each MOSFET output stage be its own independent group (i.e. op-amp, MOSFET, sense resistor).
Basically, each circuit I posted duplicated however many times needed to have the desired total load.

[MarkF]

See Jay_Diddy_B's electronic load project  as an example.

However, his control feeds the op-amp's (-) input instead.

[SebastianH]

Thanks for the very useful hint!  This answers some of my questions to some extent, and I will certainly read the thread carefully
I didn't do any stability analysis yet, but I'll look into that at some point (preferably after solving the mentioned problems).

In the thread a potentiometer is used for setting the current and (for the most part) there is no common shunt. Both design choices reduce the complexity of the design quite substantially.
So my questions mostly remain unanswered 

I appreciate any further hints.

[Berni]

You can prevent the MOSFET from going into saturation by limiting the maximum voltage that the opamp is allowed to place on the gate.

One way of doing this is to add a circuit that sends some current into the feedback network of the opamp whenever the output rises above a certain voltage. This could be as simple as a BJT with a resistor voltage divider on the base, so that you set at what voltage it turns on.

If you wanted to be even more advanced you can also add a comparator that sends some extra current into this BJTs voltage divider in order to shift its switching threshold lower whenever the current sensed by the shunt is under a certain value. This means the transistor can be kept in a slightly turned on state with no load. Then as current is seen the max gate voltage limit is lifted higher to where serious currents can flow, but is still limiting the gate voltage to a point where the mosfet continues to act linearly.

EDIT: Also you don't want to use a comparator for detecting the "gate voltage exeeding limit cirucit" this will likely cause sharp jolts into the opamps feedback loop so it will oscillate and hunt around. Using a BJT for this job gives it a nice slow soft knee so the regulation loop of the opamp can easily find a stable point on it.

[MarkF]

You can prevent the MOSFET from going into saturation by limiting the maximum voltage that the opamp is allowed to place on the gate.

One way of doing this is to add a circuit that sends some current into the feedback network of the opamp whenever the output rises above a certain voltage. This could be as simple as a BJT with a resistor voltage divider on the base, so that you set at what voltage it turns on.

Do you mean something like this?

[SebastianH]

@Berni: Your absolutely right, avoiding saturation somewhat improves the response time, but I would like to avoid the problem completely, pretty much a circuit that is safe by design.
I was a bit lazy and used a simple diode plus two resistors instead of a bjt (see attachment). For crazy dV/dt I added a Zener diode that will effectively work as a current limiter, but with a huge temperature drift, so I would think of it as an additional protection circuit

I think the only way to avoid this problem completely is to sense the voltage and implement a current limiting circuit on that basis.

In my opinion the second problem is even more challenging and I have no idea how to do this properly yet.

[MarkF]

What is this 'second problem' you are referring to?

[SebastianH]

Do you mean something like this?

In my case: Lets say the bjt would "inject" some current I_inj into the balancing resistor and the setpoint of the outer current loop has a setpoint I_setpoint > I_inj, then the outer current controller would still increase the voltage at the positive input of the opamp until it saturates.

In my application I have to manipulate the positive input of the opamp controlling the MOSFET, in a way that is similar to what Jay_Diddy_B wrote https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg2488077/#msg2488077. In fact, it is very similar to my proposal from my first post too. A main difference is that Jay_Diddy_B manipulates the current setpoint itself (summing node), whereas in "my" proposal I would simply override it: The lower controller output of both the outer current control loop and the minimum-voltage-control-loop will determine the voltage at the positive input terminal of the opamp controlling the MOSFET (because of the proposed diode circuit).  HP/Agilent was using this design in its System DC Power Supplies to "switch" between CV and CC control. For the display, they added a comparator circuit that analyzes which controller is active. Another main difference to Jay_Diddy_B application is that one of the ouputs can be assumed to be constant ("the current setpoint"), whereas in my case (and Agilents) both are controller outputs.

With the "second problem" I meant the overshoot when changing the setpoint from 0A ("off") to greater than 0A ("on"), especially if the new setpoint is small (e. g. 1mA or even 1A).

This problem doesn't really exist without the outer control loop and a simple pot. Edit: I'm not even sure that it doesn't exist.

[Berni]

Do you mean something like this?

Yes. However i would place the transistor feeding voltage right into the opamps input terminal. This means the transistor doesn't have to pass enough current to actually cause a voltage drop on the shunt, massively reducing the heat dissipation on that transistor and the power usage on the 12V rail.

Also in that way it would not inject any serious current into the shunt. You might want to use the same shunt to measure the current and display it on the front panel, so you don't want it showing a false fake current when the input is unconnected.

@Berni: Your absolutely right, avoiding saturation somewhat improves the response time, but I would like to avoid the problem completely, pretty much a circuit that is safe by design.
I was a bit lazy and used a simple diode plus two resistors instead of a bjt (see attachment). For crazy dV/dt I added a Zener diode that will effectively work as a current limiter, but with a huge temperature drift, so I would think of it as an additional protection circuit

I think the only way to avoid this problem completely is to sense the voltage and implement a current limiting circuit on that basis.

In my opinion the second problem is even more challenging and I have no idea how to do this properly yet.

Yes it really speeds up the reaction time. But it does more than that.

When a mosfet is far from saturation then large currents will cause the conduction channel to choke. At that point the mosfet starts acting as a current source that will only pass a certain amount of current regardless of the applied voltage. You simply select the appropriate max gate voltage to select the appropriate maximum current acording to the transistors datasheet. This characteristic tends to be pretty thermally dependent, but most mosfets designed for linear operation have a very wide linear area and take a lot of gate voltage to actually saturate, so you have a decently wide margin for error. Mosfets designed for switching use have a much sharper response, but most of those will also not have a proper SOA rating for DC use and will explode when used linearly like this in a electronic load. So not only does this make the reaction time faster, it also limits the magnitude of the current spike when applying a load.

If the spike is still too large then you can use the enchantment described in my post, use a comparator to detect the current being very low and using the output of that comparator to reduce the maximum gate voltage even more (add another resistor to the base of that limiting BJT). This can bring a mosfet on the lower edge of its linear region where it will not be able to pass more than a few amperes of current. Once its passing this current the comparator lets go and allows it the larger max gate voltage that covers up to the max rating of the electronic load. The only issue with this is that this is likely too temperature dependent to be reliable, so it might require a NTC resistor to automatically adjust for the correct knee voltage. Another way is to have a comparator on the input voltage, giving the load a undervoltage lockout so that it only takes current when the input voltage is above say 0.1V.
But i think this should not be required, since the opamp should catch the current pretty quickly, also its pretty normal for electronic loads to take a short current jolt when being connected to the load.

Oh and the solution with the zenner diode probably works just as well too, but will burn a considerable amount of power on it, making things get warm

[SebastianH]

Yes. However i would place the transistor feeding voltage right into the opamps input terminal.

Isn't it then a similar, but simplified version of one of the solutions I mentioned before? It certainly looks that way.

Yes it really speeds up the reaction time. But it does more than that.

When a mosfet is far from saturation then large currents will cause the conduction channel to choke.

Good point. I was running the simulation with V_DS in the 40V region. At that point the IRFP250N barely gets into saturation, but I should certainly keep that in mind for lower V_DS. So thanks for the reminder 

Another way is to have a comparator on the input voltage, giving the load a undervoltage lockout so that it only takes current when the input voltage is above say 0.1V.

Now that is almost what I proposed in my first post Instead of having a hard undervoltage lockout I would rather have a voltage controller that maintains a minimum voltage (or shuts off finally).

But i think this should not be required, since the opamp should catch the current pretty quickly, also its pretty normal for electronic loads to take a short current jolt when being connected to the load.

That may very well be pretty normal (unfortunately I have no access to a commercial DC load to get a feeling for how well those manage these situations), but I would consider it undesireable anyway Let's say I set the current to 10mA and the current spike is in the 50 mA region (or even 20 mA). The connected supply may very well get damaged by this. Now you could argue that I should build a specialized smaller DC load and you would be right. But it should be possible to design a reasonably precise DC load that can handle 1mA to 10A. 

Taking all your advice into account, I might be able to come up with something.

Oh and the solution with the zenner diode probably works just as well too, but will burn a considerable amount of power on it, making things get warm

With the circuit above, the zener diode only dissipates heat during voltage spikes at the gate caused by a huge dV/dt, because the output of the opamp is limited to just below the zener voltage by the feedback circuit. In my quick simulation, V_DS changes below 10V/µs only caused a current flow that is well within capabilities of the Zener diode.

But how can I turn on the MOSFETs reliably to lets say 1mA with lets say less than 100% overshoot, so that my outer current loop can take over? Hmm...

[Berni]

Ah sorry i was looking at the wrong diode. Yes that works too, tho its possible that the knee of that might be too soft since the opamps output has to move quite a bit before the 3.6k resistor allows enough current to flow over to make the opamp think it is regulated while its set point is set to many amps. So when set properly to not drive the mosfet into saturation at high current set points the resistor values might make the diode start taking effect a lot sooner, ruining the regulation precision.

The way to make the undervoltage protection not kick in so violently is to low pass filter the falling edge (Something like a RC filter with a diode across the R). This way the protection kicks in quickly while slowly letting back off. This makes the transistor slowly turn back on, so the opamps regulation loop has plenty of time to catch it and go back into stable current regulation. Also you can make a "soft response comparator" by simply creating a differential amplifier using a opamp and stetting its gain really high. That way the "comparator" might have a small 50mV window in its input values where the output linearly sweeps from -12V to +12V (Where it actually works as a differential amplifier) rather than snapping to +12V the moment the inputs cross each other.

[SebastianH]

So when set properly to not drive the mosfet into saturation at high current set points the resistor values might make the diode start taking effect a lot sooner, ruining the regulation precision.

Right. Then I'd replace the series resistor by a zener diode (about 5V to account for the V_GS). Then I'll get a relatively sharp knee. Or - as a middleground - indeed a bjt 
I'll consider a "soft response" solution for the voltage controller part.

[Berni]

Yep also a valid solution. The only benefit of a BJT is that the voltage can be easily adjusted with resistors, since its dependent on the mosfet partnumber, some require a lot more voltage than others. A bit of a side benefit is also that the temperature drift of the BJT also helps a bit with flowing the positive temperature coefficient of most MOSFETs, so as they get easier to turn on at high temperature, the BJT slightly lowers the gate voltage limit.

[sorin]

In my opinion you absolutely need the voltage control loop, not only to prevent the mosfet from saturation, but also to test Rechargeable Batteries.

[SebastianH]

Yeah, if I understand you correctly, you'd like to prevent deep discharge of batteries. That would rather be an UVP circuit to completely shut off the circuit, wouldn't it? Since I plan to have an STM32 + ADC/DAC, it's very easy to implement a UVP in software and it would be more than fast enough for this kind of application.
One could also implement a constant voltage control loop (which again is something different to what I proposed).  I'd possibly try to implement such thing digitally, but it might be really hard to get this loop fast enough and stable at the same time.
What I wanted to achieve though was a controller, that doesn't let the voltage drop below a certain value by reducing the current incrementally, but is completely inactive otherwise. It would drop down to zero current finally in the battery test scenario, but that may not be what you had in mind.

Still, the main challenge is to limit the inrush current when switching on the output. Simply applying a setpoint voltage to the the non-inverting opamp (current control loop open) until it is stable and then switching over to the closed-loop current control would work for higher currents (with other disadvantages). But the DC precision of the inner loop is so bad and subject to temperature drift, long term drift and so on, that it must be horrible to calibrate (if even reliably possible) for low currents in the < 50 mA region.
I could try to keep the MOSFET gates close to their threshold voltage by applying a negative voltage to the IN- via a resistor (which means an additional positive voltage at the output). But that would be virtually the same thing.

Honestly: How do BK precision and cheaper knock-offs get it done? Do these loads have massive amounts of overshoot in this region? I doubt it. Is calibration really possible? Do they have an auto-calibration feature?

 

[sorin]

If you want to control it digitally it is much simpler to do.
Just monitor the input voltage and where it is above your desired threshold voltage (for example 1V) you turn on the Current sink, when the input voltage fall under your threshold simply stop the load permanently.
When you want to test batteries just increase the minimum voltage to a value safe for the battery, for example 0.9V for NiMh and 2.7V for LiIon

I have attached a schematic just for reference.

[SebastianH]

Hey Sorin,

thanks for the schematic. And don't get me wrong, I really do appreciate you helping me out here. 

I was suprised about this schematic though, because ... I think it is a commercially available load (a really cheap one I guess).

To name just a few very odd "design" choices:
- 100µF at the input terminals? What the...?
- Filtering the setpoint signal K by two first order low passes with 4.7k and 4.7µF each (corner frequency of 7.2 Hz for such an lowpass). Why though? Yeah:
- No dedicated DAC? At first glance the microcontroller doesn't seem to have one either. Aha, PWM and a low pass filter then? Nope, I don't like that at all...
- Needless to say that at first glance I didn't see a voltage reference, but I didn't look to carefully tbh; it might not really necessary to meet the loads requirements, who knows.
- No feedback capacitor for the MOSFET drivers (TL084)? Ok, some opamps might be stable without it, especially with an 1.2kOhm gate resistor. I was curious and sceptical, so I did a quick simulation (but with an IRFP250N instead, didn't find a IRFP460 spice model). Some of the worst ringing I've ever seen and I can't say that I'm surpised (I don't say that the actual circuit has these problems, but it is quite odd)
- The control loop itself looks quite strange and possibly very slow
- And all these pots, nope, I certainly don't want to deal with that many pots.
- ...

Probably (or hopefully) it is a reverse engineered schematic with many errors...

I don't consider myself an expert in this area (obviously), but I don't think this is a particularly good example of a dc load (or schematic I should say).

[sorin]

It is obvious that this is a reversed schematic and is not very accurate, I posted just for reference.
In my opinion a very fast Electronic Load is not useful because if you test a power supply with that it most brobablly will oscillate due to the concurrent controlling loops.
After reading your post I have done some stimulation on LTspice, and I dont see any problem, ok is a bit slower but that is all. From 0 to 10A it stabilized in under 20us.
Even Lab Power Supply have a capacitor on output, I have seen some have a 330uF output Cap.

[SebastianH]

After reading your post I have done some stimulation on LTspice, and I dont see any problem, ok is a bit slower but that is all. From 0 to 10A it stabilized in under 20us.

Which circuit are you refering to? Mine or the Array one?

I'm pretty happy with the general performance of my control loop. In the mean time I simulated a different approach with an error amp + current shunt measurement which performes even better.

My main problem is still the region of very low currents, particularly the switch on procedure. It does works fine down to ~2mA, although in this low current range it takes a 10 ... 20 ms (!) until the FETs are switched on (i.e. the integrator capacitance has been charged to v_gs. If I have for example 5 parallel FETs, that would result in ~5+ mA minimum switch on "inrush" current. One observation is that the integrator capacitance is discharged through the gate-source resistor, which is kind of "necessary".

Even Lab Power Supply have a capacitor on output, I have seen some have a 330uF output Cap.

Right. Since lab supplies have a voltage control loop primarily and the current limiting loop as a secondary loop, it makes absolutely sense to have some capacitance at the output of a power supply. But the bigger the capacitance the worse the transition from CV to CC. But I assume you know all that anyway 

But this is valid for DC loads also, and therefore higher grade DC loads usually have a rather small input capacitance, the biggest capacitor likely in the snubber circuit (a good example is the HP 6060B, Service manual with full schematic available).

[sorin]

Which circuit are you refering to? Mine or the Array one?

Array one.

I have some suggestion for you
- Reed the Datasheet
- Reed the Datasheet
- Reed the Datasheet
- " The OPA27 is internally compensated for unity-gain stability. The decompensated OPA37 requires a closed-loop gain ≥ 5."
  It is clear that U1 dont have a gain ≥ 5, it is inadequate for the job, replace it with MC34072, or similar. You need to consider output Current and Phase margin.
- C1 is way to large, I suggest it to be max 220pF.
- You need a resistor in parallel with C1 to discharge it.
- I suggest not to use a Differential Amplifier for R3 Voltage, try with simple Amplifier.

[SebastianH]

Hey Sorin,

this circuit - in this particular simulation - is in fact very stable, phase margin ~77°, gain margin ~18dB. And it not that surprising either.

- " The OPA27 is internally compensated for unity-gain stability. The decompensated OPA37 requires a closed-loop gain ≥ 5."
  It is clear that U1 dont have a gain ≥ 5, it is inadequate for the job, replace it with MC34072, or similar. You need to consider output Current and Phase margin.

Absolutely does the OPA37 require a closed-loop gain >= 5. But what we actually need is less than 0dB gain at -180°, so that there is negative feedback as long as the gain is greater or equal to zero dB. If you had an inverting amplifier, at the output you would get a response like in the picture "Inverting Amplifier Gain", where i plotted G=1, 3, 5, 7 and 9. It's obvious that G=1 isn't stable, whereas with increasing gain the circuit gets better and better (I chose pretty large R's to amplify the problem  ). And the loop gain indicates that too.

But in my case I build an (inverting) integrator (not an inverting amplifier), which by the way has a summing point in front of it. If you look at the first plot you can see, that the integrator attenuates high frequencies (who knew) and therefore I DON'T have any problems with that

Let's say I' replace C by a 100k (1M, 10M...) resistor: What would happen is that I'd REDUCE the DC gain of the amplifier to 10^2 (10^3, 10^4). In fact the DC precision of the circuit depends on a fairly high gain in the loop while attenuating the higher frequencies. That is the whole point of it. Otherwise I could use a P controller with a low gain.

In theory, I think there is nothing wrong with using the OPA37 in this situation if the loop is stable (and in the simulation it is). It has a slight advantage regarding its DC performance compared to let's say the NE5532. This doesn't really matter as soon as there is an outer control loop though. But: It is simply too expensive, and a NE5532 (which is commonly used in DC loads) is almost as good.

- C1 is way to large, I suggest it to be max 220pF.

Again, If you are refering to a different circuit with a different opamp, sure. 220pF or even 22pF might do if you use the MC34072 which is unity gain stable and capable of driving capacitances (yeah, i know) and has a much lower bandwidth. By the way: In this particular circuit, the mentioned NE5532 would require the same capacitance.
I might give the MC34072 or similar a try anyway.

- You need a resistor in parallel with C1 to discharge it.

The discharge resistor would prevent an "open-loop" integrator to go into saturation due to the input offset voltage - for an open loop integrator.
In this case: As soon as the output voltage would go towards saturation, the current would increase and then the error, which would counter-act any further drift. Right now I don't see any mechanism that would cause this problem when there is a loop outside.

The offset voltage of the opamp will result in a permant deviation from the setpoint though, hence the better DC performance of the OPA37 (or OPA27, it doesn't really matter too much) compared to the NE5532 and so on. Again: Doesn't matter if there is an outer loop controlling this inner loop. I'm pretty confident that the (slower) outer loop will allow me to reduce the capacitance in the inner loop.

What I have to admit though: I don't know whether or not the simulation results will lead to a functioning design.

- I suggest not to use a Differential Amplifier for R3 Voltage, try with simple Amplifier.

One could do that. I chose this design mainly to avoid ground bounce. (HP did this too in its 6060B load as I found out).