EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: mcdesca on July 14, 2015, 05:11:04 pm
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Dear everybody,
I have an MCU with a 12bit DAC that outputs a signal between 0 and 3.3V. My system's output should be between 0 and 10 volts but amplifying from 3V3 would loose too much sensitivity. For that, I propose the attached circuit.
The DAC will be divided down to 2V5 and will be firing one of the summing amplifier's input. The other input, will be connected to a standard 3V3 DO (which will be divided down to 2V5 as well). Now the opamp's input goes from 0 to 5V ans then the sum amplified by a gain of 2. The opamp is an lm358 but could be anything else (I have actually ordered some OPA320)
My doubts are:
- My experience with DAC's is that they tend to be very noisy, so I prefer to work on its full scale (or rather, the higher the DAC's output, the less dominant the noise is). So my forst approach was to divide its output and the implement some kind of "range extender".
- I am now able to increase the range and/or sensitivity by cascading more summing amplifiers and modifying the divider net but, would a Variable Gain Amplifier or a variable gain set by digital pot be much better? Is there any standard method of increasing the range of a signal?
- I am aware that certain glitch will appear when transitioning between DAC: 3V3 DO: 0V and DAC: 0V DO: 3V3 (which should give out the same 5V value), is there any way to mitigate this? sample and hold circuitry after the opamp maybe? (The MCU is a 32bit@72MHz, I assume there won't be much of a lag between DAC buffer update and pin (de)activation).
- I have set the gain of the opamp to 2. Is there any rule on this (low gains are prone to noise/oscillations...)?
The 0 to 10V output will be the setpoint for a PID control loop performed by another opamp.
Many thanks in advance for your comments.
Best,
Xavi
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You can use a divider or change the DAC Vref to emit a DAC signal that is 2.5V full scale. Then use a non-inverting op amp with switched feedback lines to emit 0, 2.5, 5 and 7.5V from a 2.5V reference like MC1403 or REF03. Then add the two voltages together use another op amp. This effectively gives you two more bits of resolution.
This feedback switching can be done using 4000-series CMOS parts which can withstand 15-18V, and level translation can be done using 74HC/LVC06 which withstands 30V on its output pin.
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Just don't expect it to be monotonic, as it is extremely difficult (if not impossible) to get the top end of one range to match up with the bottom end of the next without either an overlap or a gap. Even if you can hold 0.1% tolerances all through the circuit, that's only enough for 9 bits of monotonicity.
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Sorry guys for a bit offtopic beginner question, but I don't understand how R35 - R36 pair is intended to work :( I got that we change 0 - 3.3 range to 0 - 2.5, but then what ? It's either too late and I need some sleep or I totally misreading what's should happen there, even tried to simulate and result is still in 0 - 2.5 range, is it what intended ? then how we get 0 - 5 range ?
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The input labelled RANGE is presumably a digital signal with 3.3V logic '1' level.
The bottom '0 - 2.5V' signal is then summed with the top one (which should actually be labelled '0 or 2.5V') via R35,R36. That means the RANGE signal acts as an extra MSB, turning the 12 bit DAC into a 13 bit one, only with a nasty nonlinearity at the halfway point.
It can be improved by ditching the dividers and running the DAC with a 2.56V reference and using the same reference via low on resistance complimentary MOSFETS to switch the RANGE signal between 0V and 2.56V, but monotonicity will still be nearly impossible to achieve even if you use 0.01% resistors for R35,R36. The best you can do is make R36 fractionally larger than R35 to ensure an overlap of the order of ten DAC counts then calibrate out the overlap in software.
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Hello,
The RANGE input is indeed connected to a Digital Output of the MCU.
I've changed the DO for a voltage reference and an analog switch.
I do agree that the output is susceptible to present some kind of discontinuity, but so does the DAC output (in fact is a summing amplifier R/2R arrangement as well). I see it feasible to calibrate the output by triming R48 and R57 and/or by software means.
What would otherwise be a better solution? I guess modern Arbitrary Waveform Generators use a DAc in the order of 20bit resolution and then add an amplifying stage.
Thanks.
Best,
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http://masteringelectronicsdesign.com/the-transfer-function-of-the-summing-amplifier-with-n-input-signals/ (http://masteringelectronicsdesign.com/the-transfer-function-of-the-summing-amplifier-with-n-input-signals/)
I mean I don't understand how we get 0 - 10v when it's supposed to be 0 - 5v on the output of opamp, V = (1 + R21/R22) * (DAC_OUT1 * R36 / (R35 + R36) + RANGE * R35 / (R35 + R36)), so V will be in 0 - 5v range, or am I missing something ?
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Jimon,
You are right, the gain should be 4 so R21/R22 = 3.
In your previous question, it won't work unless you insert a feedback loop (opamp).
Best,
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There are no low pass filter at all. Add a few, will save you from the most significant glitch issues.
Make the RANGE pin slow as hell so you can compensate the glitch with lowering the dac code.
Loop back the output so you can either measure and/or regulate the output.
Also, as suggested earlier, the two ranges should overlap so you can self-calibrate the most linear codes. And use proper reference of 2.5-ish volts instead of a divivder at the dac output. Note, this will most likely also effect your ADC ref.
And, reconsider if you actually need better than the ideally ~3mV per bit resolution.