Electronics > Projects, Designs, and Technical Stuff

DC load using a CPU cooler

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microbug:
There will be a negative rail for the op-amps, generated by an inverting switching controller. I don't know if an 'old-school' trimmable op-amp will be better overall than an OPA4188 - it has a very low offset anyway and the drift over temperature is extremely low.

EDIT: Do you have any specific suggestions for a better op-amp?

rob77:
actually those "zero-drift" opamps from TI look pretty good, the thermal stability is impressive. but i'm afraid the 25uV offset is too much for your 16bit DAC. datasheet states 6uV typical , but you know you have to consider the max value which is 25uV ;) but anyways - you can compensate for that even if there are no offset trim pins - but it's less elegant than a trimpot ;)

btw... if you'll use a 4.096V reference , then why not to use a 12bit dac ? 16bit is a overkill - you can't build the circuit stable enough anyways... your opamp will be zero-drift ,but the resistors not ;) someone will sneeze in the room and the whole thing will drift away - rendering the extra 4 DAC bits useless :D

microbug:
@rob77, I guess you're right. Besides, the current/voltage set resolution will still be perfectly good - 100uA on 409.6mA; 1mA on 4.096A and 10mA on 40.96A. If I go with a 12 bit DAC, I can use the built in 12 bit ADC on the PSoC 4, both saving components and improving transient response for software constant-power/constant-resistance.

microbug:
I found a good DAC: DAC7613. This will let me use the REF2041 as timb suggested!

microbug:
@timb: how should I negate the offset voltage (nominal +/- 4LSB) of the DAC buffer? You mentioned that it's easier to use a 'positive offset voltage' - what do you mean?

EDIT: Unless there's a better way, I'll use a resistor divider between 2.048V and ground to generate 2.045V (6 LSB down), and trim in software.

EDIT 2: I attached my attempt at a negative offset voltage for the DAC output. Will it work?

EDIT 3: ... or would I be better off having the same voltage divider on the VREFL and VREFH inputs?

EDIT 4: Since the range of the DAC is now effectively 0-2.048V, it makes more sense to make the current ranges in multiples of 10 of 2.048V. Therefore, I will have current ranges of 204.8mA, 2.048A and 20.48A.

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