Although it would make a perhaps negligible difference, I think power loss will be less in the case of high-speed driving.
At each cycle the switching occurs at the same time (and with the same duration of) a gate charging/discharging. Energy loss in gate charging is (for each complete charge+discharge) Vdrive*Idrive*Tturn_(off/on). Each complete turn ON+turn OFF dissipates on a power MOSFET Vbus*Ioutput*Tturn_(on/off) [J]. Since Vbus and Iout both are much higher than Vdrive and Idrive, I guess reducing the more possible T_turn(off/on) would reduce losses. This could be interesting only for the purpose of enclosing the inverter in a small case.
But then the power dissipation due to the ridiculously low resistor values would be higher so you gain nothing. I think you've forgotten that the circuit works by shorting the MOSFET gates to 0V to turn them on.
Reducing the gate resistors to Q5 and Q6 shouldn't increase the switching speed much because of R2 to R4 will slow things down too much. Incidentally the gate resistor of the submissive input will only cause high power dissipation, when both PIC outputs are high, so it's not a problem.
R2 to R4 need to be reduced as well, to have any effect. Suppose you set the values so the current it 25mA (a total resistance of 960R), the power dissipation due to them would be 0.6W.
Although the instantaneous power dissipation will be quite high (12W, assuming a current of 1A and a power supply voltage of 24V) that condition will only occur for a short time each cycle so the average power dissipation will be tiny.
What do you think the switching speed of the MOSFETs will be?
I've never done this calculation before so I'll guess.
The maximum gate capacitance of the IRL540 is 1.96nF, with a resistor is 10k, the time constant is only 19.6µs for the bottom MOSFETs
The maximum gate capacitance for the IRL9540 is 1.3nF so with 22k the discharge time constant is only 28.6µs and the charging time constant will be 10k|22k = 6.67k*1.3nF = 8.67µs
I don't see how such short gate RC time constants can slow the MOSFETs down enough to cause significant power dissipation.
Even if the MOSFETs took 100µs (over three times the longest RC time constant) to both turn on and off the power dissipation should be under 0.6W.
I = 1A
Tswitch = 100
-6s
F = 50Hz
V = 24V
P = 0.5I*V*Tswitch*2F
The current is halved because MOSFETs are current controlled so act like constant current loads when operating in the active region.
The frequency is doubled because it swichs twice per cycle.
So it can be simplified to P = I*V*Tswitch*F
100*10
-6*24*100 = 0.24W and don't forget that's spread over four transistors in TO-220 packages not mostly in an LM78L05 which is in a tin TO-92 package.
I don't see how it could switch any slower than that, the chances are it'll be faster, if you know the correct calculation and think it'll be slower then please demonstrate it.
Yes, even if one tried to put the same "shoot-trhough prevention" diode on both PIC outputs, a different delay should be put on the two paths to prevent a race.
The diode method won't work on both outputs, it only works with one being the dominant and the other being submissive.
The best way of doing it is to logic gates so if both inputs go high, the output will be low, even then there's a risk of race so there should be the correct number of gates, have them clocked or use RC time constants to make sure the inputs change when they should.
You could use a quad NOR gate IC, Schmitt trigger is probably best, I'll post the circuit if you or Simon are interested but I don't see the point: it's an extra IC to provide protection against an unlikely catastrophic event.