| Electronics > Projects, Designs, and Technical Stuff |
| DDR2 chip how slow can you go? |
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| SiliconWizard:
OK now that's clearer. I agree in your case RAM would make a lot more sense. SDRAM would be the way to go IMO. Take a look there: http://www.issi.com/US/product-dram-SDR.shtml For the same memory size with SRAM, you'll need quite a few ICs and that will cost you an arm and a leg. |
| JohanHoltby:
--- Quote from: nctnico on August 30, 2019, 07:14:54 pm ---IOW: use a cheap FPGA (Xilinx Spartan series for example) to read a bunch of ADCs and stream the data into a PC using PCIexpress. Inside the PC you'll have easy access to (fast) data storage and analysis. --- End quote --- This is an interesting point and I will probably go this rout to extract the data from the system but not by live streaming since the system might have up to 8 boards in each stacks and up to 16 stacks and each board will have 80 1Msps data streams (1Msps per adc channel). That would be about 10 gigabytes (not bit) per second. The BOM cost per board my not be above 400 dollars or it will be hard to sell to the end customer. Is that inside an arm and an leg? If not I will need to limit the amount of memory. |
| SiliconWizard:
--- Quote from: JohanHoltby on August 30, 2019, 10:52:26 pm --- --- Quote from: nctnico on August 30, 2019, 07:14:54 pm ---IOW: use a cheap FPGA (Xilinx Spartan series for example) to read a bunch of ADCs and stream the data into a PC using PCIexpress. Inside the PC you'll have easy access to (fast) data storage and analysis. --- End quote --- This is an interesting point and I will probably go this rout to extract the data from the system but not by live streaming since the system might have up to 8 boards in each stacks and up to 16 stacks and each board will have 80 1Msps data streams (1Msps per adc channel). That would be about 10 gigabytes (not bit) per second. The BOM cost per board my not be above 400 dollars or it will be hard to sell to the end customer. Is that inside an arm and an leg? If not I will need to limit the amount of memory. --- End quote --- Oh, for this amount you could definitely go for an external ADC+FPGA+DDR2 or DDR3 RAM... would cost you a lot less than an MCU+several big SRAM chips. |
| JohanHoltby:
I will take a look in to that advice and investigate that stack. using a single FPGA would be nice since that would same som real estate which is not a luxury I have since I need to fit it all inside a standard test fixture. :) The problem I did find before was that the ADC was very costly when they where not dedicated. An alternative would be using the STM32 with 4ADC ringing att 5Msps and use the 4 SPI channels at 18MBps to stream the data to the FPGA. Sure I would not get all the data there but I could limit the stored data frequency. |
| nctnico:
The ADCs inside a microcontroller may not be very good compared to a dedicated ADC chip. Especially in lower cost microcontrollers. |
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