Author Topic: DDR2 chip how slow can you go?  (Read 5928 times)

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Offline JohanHoltbyTopic starter

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DDR2 chip how slow can you go?
« on: August 28, 2019, 09:53:57 pm »
Hi
I'm investigating how to store a lot of data. and need an as cheap as possible data storage solution. Flash is not an option since I will write it over multiple times every minute.

I'm lookng att an DDR2 chip but since I'm using a low voltage STM32 device which only has a clock speed of about 72mhz. How slow can I go without any problem?

The chip has auto refresh so that will be handled by the ship itself. Cost is a factor so going to SRAM is not an too intresting option if I can get away with using DDR2 chips.


The chip is: W971GG6SB-25-ND
https://www.digikey.se/product-detail/sv/winbond-electronics/W971GG6SB-25/W971GG6SB-25-ND/5125232
 

Offline amyk

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Re: DDR2 chip how slow can you go?
« Reply #1 on: August 29, 2019, 01:21:13 am »
The datasheet shows a maximum clock period of 8ns, or 125MHz as the minimum speed at which they guarantee it to work.  In practice I believe this is limited by the leakage of the dynamic logic used within, which is related to operating temperature.  This means that it may be possible to go lower if you don't let the temperature go up too high, but I suspect you'll encounter a lot of part-to-part variance.
 

Online wraper

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Re: DDR2 chip how slow can you go?
« Reply #2 on: August 29, 2019, 01:25:04 am »
Wait, are you going to bit bang DDR2?  :wtf:.
 

Offline T3sl4co1l

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Re: DDR2 chip how slow can you go?
« Reply #3 on: August 29, 2019, 02:31:13 am »
What overall lifetime do you want?

Flash at that rate isn't bad if you have tens of gigs to spare.  Shove in an uSD and be done?

You may also consider buffering incremental changes in SRAM or FeRAM, then dumping larger payloads into Flash much less frequently (minutes, hours even?).

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Offline jbb

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Re: DDR2 chip how slow can you go?
« Reply #4 on: August 29, 2019, 02:44:29 am »
It costs more per bit than commodity, but Cypress and Winbond (and some others) have SDR SRAM still very much in production. This should be compatible with the STM32 external memory interface.
 

Offline pigrew

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Re: DDR2 chip how slow can you go?
« Reply #5 on: August 29, 2019, 03:36:11 am »
While you may be able to bit-bang DDR2, it'd be tough, and your throughput would be awful. You may end up needing external logic ICs, too.

I found a PDF describing which STM32 models are compatible with which RAM types. It looks like most of the F7 and some of the F4 have SDRAM interfaces, which support up to 512 Mb in a package. It appears that, for example, the F469 can control two separate SDRAMs, so that'll get you a gigabyte of storage. (but I've never used SDRAM on the STM32 before, so I don't know much more than I've written).

ADDENDUM: In STM32CubeMX, you can filter by which MCUs have a "FMC" to see which are available. Some L4, G4, and F3 are listed, so you can get lower power/slower than the F4 would be. The main constraint in timing is the refresh interval, which is every 64 ms, so you should be able to clock things fairly slow.
« Last Edit: August 29, 2019, 03:38:53 am by pigrew »
 
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Offline james_s

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Re: DDR2 chip how slow can you go?
« Reply #6 on: August 29, 2019, 04:31:36 am »
If you really want to use DDR RAM then you should look at using a small FPGA to implement the memory controller. There is code already written that will let you use it somewhat like SRAM.
 
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Offline Berni

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Re: DDR2 chip how slow can you go?
« Reply #7 on: August 29, 2019, 05:01:26 am »
Just use some SDRAM instead, its available in pretty large sizes for cheep and a lot of STM32 MCUs have a memory controller that supports it.

This not only makes it faster as its not bitbanged, but it also properly memory maps the RAM so that to the CPU it looks exactly the same as internal RAM. This lets you use the RAM for anything, including executing code from it and easily DMA data in and out of it.
 
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Offline krho

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Re: DDR2 chip how slow can you go?
« Reply #8 on: August 29, 2019, 03:12:16 pm »
Or he can use STM32MP151 with LPDDR2/3  DDR3, DDR3L, with FreeRTOS on A7 :P, the CPU itself costs less than M7
 
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Offline Yansi

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Re: DDR2 chip how slow can you go?
« Reply #9 on: August 29, 2019, 05:27:40 pm »
Somebody clearly just got the evil bluepill board and a soldering iron and has as we say "too big eyes".

I am missing any application specs for data troughput, storage capacity, etc and a sensible description of what has to be achieved. You know, SDcards can hold tens of GBytes.

There is a crapton of STM32 chips with integrated SDR memory controllers, that can tackle I think up to 512MByte SDRAM.

(Forget MP1, you won't make that one work, it is a pain even for those who know what they are doing)

 
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Offline jbb

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Re: DDR2 chip how slow can you go?
« Reply #10 on: August 29, 2019, 07:12:53 pm »
Some words of warning when using external SDRAM:
  • Thorough testing is suggested with low / high supply voltage and low / high temperature to make sure everything is configured correctly
  • It's likely slower than internal RAM, so you'll need to do some reading about linker behaviour make sure your most critical storage - e.g. stack and critical RTOS tables - are in on-chip RAM
  • If you don't want people copying your code, don't run code from external RAM
  • If you're doing any cryptographic security, make sure the keys stay in internal RAM
  • SDRAM will increase your standby power consumption
 
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Offline nctnico

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Re: DDR2 chip how slow can you go?
« Reply #11 on: August 29, 2019, 07:53:49 pm »
Hi
I'm investigating how to store a lot of data. and need an as cheap as possible data storage solution. Flash is not an option since I will write it over multiple times every minute.

I'm lookng att an DDR2 chip but since I'm using a low voltage STM32 device which only has a clock speed of about 72mhz. How slow can I go without any problem?
IIRC DDR2 has two modes: with PLL enabled and PLL disabled. In the latter mode it can work at very slow speeds. The slow speeds are used to load test patterns into the memory which are then used to compensate the delays at the normal operating speed. Needless to say the memory will work just fine for as long as you adhere to the refresh intervals (and auto refresh is an easy way to do this). However a big nand-flash connected to SPI might be another option. You'll need to have BCH error correction and be able to detect bad blocks but even at many overwrites it will take long to wear the flash out. If you don't need any long term data retention then flash wear may not even be an issue.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 
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Offline ejeffrey

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Re: DDR2 chip how slow can you go?
« Reply #12 on: August 29, 2019, 08:56:13 pm »
  • If you're doing any cryptographic security, make sure the keys stay in internal RAM

Internal keys are only slightly more secure than external keys. If you need physical tamper-proof cypto you should be using a special purpose crypto processor.

 

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Re: DDR2 chip how slow can you go?
« Reply #13 on: August 29, 2019, 09:26:02 pm »
How about using a small FPGA? If this is for your all-seeing-scope project ( Here ) then things might actually get simpler (and comparably priced) with the proper FPGA. Look around, lattice has fairly cheap FPGAs ( https://www.digikey.sk/products/en/integrated-circuits-ics/embedded-fpgas-field-programmable-gate-array/696?FV=ffe002b8&quantity=0&ColumnSort=1000011&page=1&pageSize=25 ).
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Offline SiliconWizard

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Re: DDR2 chip how slow can you go?
« Reply #14 on: August 29, 2019, 10:47:06 pm »
Flash is not an option since I will write it over multiple times every minute.

You may want to consider whether you really need to do that to begin with, or at least explain to us why. DO you really need to store that much data multiple times every minute? What are you going to do with this data? Can you not store smaller chunks and process them accordingly instead?

Once you're sure you have no choice, you could still consider using Flash for that. Using an SD card or something would get you for relatively cheap so much more memory than a single RAM chip (the one you showed is 128MBytes if I'm not mistaken), that you could just use a very simple wear-leveling scheme (writing your blocks of data to a different area every time, and then cycle when you've reached the end of the SD card) that would get you a pretty decent lifetime.

Otherwise, if you're sure this is really not an option, SDRAM would be more adequate here than DDR2 as already said (but you'll have a hard time finding single SDRAM chips with that much memory, so maybe that's why you targetted DDR2?)

PSRAM would otherwise be an option too, but they usually come in more limited memory size. How much memory do you REALLY need?
« Last Edit: August 29, 2019, 10:48:37 pm by SiliconWizard »
 
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Offline JohanHoltbyTopic starter

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Re: DDR2 chip how slow can you go?
« Reply #15 on: August 30, 2019, 03:09:42 pm »
Wow such much great thoughts Thank you all!

So what I can conclude is that I should not do the DDR2 since it has speed requirements due to ?????. The refresh time is required  to be 64ms.
The alternative would be to use SDRAM since that is not requiring a curtain speed.  And by using the FMC I will get a lot of less headache.  I will be generating about 1 mega sampels per second from up to 16 channels. So 16 mega byte per second of data in worst case scenario and about 5-10 seconds of data. When i did some calculations I noticed that FLASHs will not be an option since this will be running 24/7 365 days per year. The requirements is not a hard requirement and I have a lot of workarounds that might work, like only storing the value furthest away from the previous value during a 8 sample cycle or similar. The end product is a production test tool so strange spikes and such is of great interest.

How about using a small FPGA? If this is for your all-seeing-scope project ( Here ) then things might actually get simpler (and comparably priced) with the proper FPGA.

Great name on the project will stick to it :). Yes its that one. I have been looking in to FPGAs as an alternative but the great challenge is that I need 80 analog in at about 1Msps per board at low cost and the I would need external ADC or more costly FPGAs with ADC built in to it. Pleas if you got any suggestions for FPGAs I'm all open.
 

Offline DaJMasta

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Re: DDR2 chip how slow can you go?
« Reply #16 on: August 30, 2019, 03:33:49 pm »
80 analog lines?  What  micro has that?

In any case, the usual way to deal with so many lines would be an analog multiplexer (well, several of them) - so long as it's not 1MS/s per line, it should be pretty manageable to do with a single (or small number) of ADC inputs and the switching controls.

If you actually have a micro in your design with 80+ ADC inputs, switching to a smaller size one could easily give you enough BoM budget headroom to afford a small FPGA, a bank of SRAMs, a discrete ADC, or almost anything you could be after.... those things ain't cheap.  It sounds to me like SRAM is the right part for the job, but swapping down the micro and FPGA+DDR2 would probably work fine too.
 

Offline SiliconWizard

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Re: DDR2 chip how slow can you go?
« Reply #17 on: August 30, 2019, 03:54:39 pm »
The end product is a production test tool so strange spikes and such is of great interest.

OK. You're still not saying what you are doing with the stored data.
Since you will be writing it over on a regular basis, what are you going to do with the overwritten (past) data? Just discard it? Or send it somewhere through some link? That point may help finding an appropriate solution and figure out how much temporary memory you really need.

If you're interested in detecting specific events ("strange spikes") can you not implement some kind of internal triggering on such events, and only store a chunk of samples around them (as a scope would do)? That would also limit the memory size requirement.

As for Flash, as I suggested, using SD cards may be a workable solution (as long as write speeds are OK with your application). Cheap, if you use large ones, you can do decent wear leveling, and if they wear out, you can always replace them (even on a regular basis). Much easier than replacing a soldered chip. Added benefit is that the last samples will remain stored if your system crashes for any reason, whereas if you're using RAM only, they will just be lost.

 

Offline Berni

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Re: DDR2 chip how slow can you go?
« Reply #18 on: August 30, 2019, 04:26:14 pm »
Wow such much great thoughts Thank you all!

So what I can conclude is that I should not do the DDR2 since it has speed requirements due to ?????. The refresh time is required  to be 64ms.
The alternative would be to use SDRAM since that is not requiring a curtain speed.  And by using the FMC I will get a lot of less headache.  I will be generating about 1 mega sampels per second from up to 16 channels. So 16 mega byte per second of data in worst case scenario and about 5-10 seconds of data. When i did some calculations I noticed that FLASHs will not be an option since this will be running 24/7 365 days per year. The requirements is not a hard requirement and I have a lot of workarounds that might work, like only storing the value furthest away from the previous value during a 8 sample cycle or similar. The end product is a production test tool so strange spikes and such is of great interest.

What i want to hear is what STM32 MCU has such a high performance ADC to get 16 channels at 1MSPS 16bit each. I think the most i have seen is 3 ADCs in one chip that can do about 2MSPS at 16bit

The problem with running DDR2 chips slowly is the DDR part. They run on both edges of the clock so there is extra interface timing crap with tuned delays to make this work reliably at high speeds. You can issue refresh commands as fast as you want, but overall its a pretty complex interface that has a ton more than just reading and writing to memory cells, just go look at a DDR2 chip datahseet.
 

Offline Yansi

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Re: DDR2 chip how slow can you go?
« Reply #19 on: August 30, 2019, 04:45:51 pm »
What I would want to hear instead is what is Johan trying to achieve? So far he looks confused even himself about his goal.
 

Offline bson

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Re: DDR2 chip how slow can you go?
« Reply #20 on: August 30, 2019, 06:07:42 pm »
And by using the FMC I will get a lot of less headache.
Just be aware that many STM32 packages have an abbreviated FMC interface.  Especially the smaller packages either omit it altogether or have only a small subset of signals to drive things like 8080-bus interface LCD controllers (where data matters and only a few address lines are provided in case you need them for arbitration and addressing logic).  On chips like the F103 I've found you will need the full density BGA packages to get the full FMC, and even then it's often pin sharing with other precious functions, and you might find yourself unable to use it at all with any amount of pin or port swapping.
« Last Edit: August 30, 2019, 06:10:12 pm by bson »
 

Offline Yansi

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Re: DDR2 chip how slow can you go?
« Reply #21 on: August 30, 2019, 06:14:30 pm »
FMC is not FSMC peripheral and secondly he may be more concerned he probably can't do the layout for the multiple chip high capacity SDRAM bank alltogether. (Even though such layout may not be difficult at all, but judging from the style of questions and lack of basic understanding, there may be quite steep learning curve to be aware of)


Note: interfacing a huge SDRAM bank is never considered doable with any small package. Likely 176pin one required.
« Last Edit: August 30, 2019, 06:20:31 pm by Yansi »
 

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Re: DDR2 chip how slow can you go?
« Reply #22 on: August 30, 2019, 06:32:02 pm »
Quote
Great name on the project will stick to it :). Yes its that one. I have been looking in to FPGAs as an alternative but the great challenge is that I need 80 analog in at about 1Msps per board at low cost and the I would need external ADC or more costly FPGAs with ADC built in to it. Pleas if you got any suggestions for FPGAs I'm all open.
Unless you need isolation, then at 80 channels per board you're likely better off with one hefty FPGA and 10x simultaneously sampling 8 channel ADCs ( such as this: http://www.ti.com/product/ADS8598H# or https://www.analog.com/en/ltc2320-12 ). The price per chip is fairly large (though cheaper ones exist), but at a quick guess it might be cheaper than an MCU + Hacked RAM.

Essentially per channel, let's say you manage to hack a cheap (3USD) DDR2 memory to play along with a cheapish STM32 (say, 2-3 USD), then you get 6 USD per channel.

With a single 10 USD ADC such as the https://www.analog.com/en/products/ltc2320-12.html#product-overview you get 0.95 USD per channel. The processing stuff (FPGA) will be more expensive, but will be single and the costs for this will be divided between all of the channels.
« Last Edit: August 30, 2019, 06:40:16 pm by daqq »
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Offline Yansi

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Re: DDR2 chip how slow can you go?
« Reply #23 on: August 30, 2019, 06:41:20 pm »
Why do you even consider hacking the ram? Considering this is basicaly likely not doable at all, otherwise don't you have anyhing better to do than hacking what is way easier done the proper way?

I am even lacking any explanation what he will do with all hose data in the memory or any further explanation of the project.
 

Offline nctnico

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Re: DDR2 chip how slow can you go?
« Reply #24 on: August 30, 2019, 07:14:54 pm »
Wow such much great thoughts Thank you all!

So what I can conclude is that I should not do the DDR2 since it has speed requirements due to ?????. The refresh time is required  to be 64ms.
The alternative would be to use SDRAM since that is not requiring a curtain speed.  And by using the FMC I will get a lot of less headache.  I will be generating about 1 mega sampels per second from up to 16 channels. So 16 mega byte per second of data in worst case scenario and about 5-10 seconds of data. When i did some calculations I noticed that FLASHs will not be an option since this will be running 24/7 365 days per year. The requirements is not a hard requirement and I have a lot of workarounds that might work, like only storing the value furthest away from the previous value during a 8 sample cycle or similar. The end product is a production test tool so strange spikes and such is of great interest.

How about using a small FPGA? If this is for your all-seeing-scope project ( Here ) then things might actually get simpler (and comparably priced) with the proper FPGA.

Great name on the project will stick to it :). Yes its that one. I have been looking in to FPGAs as an alternative but the great challenge is that I need 80 analog in at about 1Msps per board at low cost and the I would need external ADC or more costly FPGAs with ADC built in to it. Pleas if you got any suggestions for FPGAs I'm all open.
I have the feeling that by the time you have designed this you spend more money compared to just buying a data acquisition system. Unless ofcourse this has to become a product. But even then this is likely for a niche market. I'd optimise the design for the least amount of R&D effort and risks. Starting with low cost parts is not the good direction because it will lead to a large amount of effort to make it work. IOW: use a cheap FPGA (Xilinx Spartan series for example) to read a bunch of ADCs and stream the data into a PC using PCIexpress.  Inside the PC you'll have easy access to (fast) data storage and analysis.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 


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