Author Topic: DDS Function Gen Layout Review  (Read 21290 times)

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Offline jgrossmanTopic starter

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DDS Function Gen Layout Review
« on: October 18, 2023, 02:38:27 am »
Hello EEVblog  :D

I am planning my first from-scratch electronics project which is a small, lowish frequency signal gen with an STM32 and an AD9837. I want to get feedback on the layout in particular, since is this the very first time I have ever laid out a board, period, so surely I am doing some dumb/non-optimal stuff. The things regarding the power and analog portions are what I am worried most about. Any feedback, no matter how obvious, is appreciated  :-+

My targets are:

  • Frequency: As low as reasonable, up to 1 to 2MHz
  • Amplitude: From 0.600Vpp to 5Vpp
  • Waveforms: Sine, square, and triangle waves at all frequencies

Here are the front/back view of layout, as well as the front layout annotated to roughly correspond with the high-level blocks from the schematic:










Schematics:





« Last Edit: October 18, 2023, 02:41:16 am by jgrossman »
 

Offline MarkF

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Re: DDS Function Gen Layout Review
« Reply #1 on: October 18, 2023, 04:51:20 am »
Have a look at the Function Generator I built using a AD9834 and screen captures of the waveforms:
   https://www.eevblog.com/forum/testgear/looking-for-lt$50-function-generator/msg3082494/#msg3082494

By taking advantage of the differential outputs of the AD9834, changing the amplitude does NOT change the DC offset.

The only thing I don't like is that the sine and triangle outputs are on one pin and the square wave on another.  (Note:  I don't have any scaling or offset on the square wave output.)  The square wave output is just a TTL level in my design and it includes a sync pulse for freq sweeps and is multiplexed with the MCU to provide a PWM output.


Modified design (haven't built it):
« Last Edit: October 29, 2023, 03:46:29 pm by MarkF »
 

Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #2 on: October 18, 2023, 05:17:01 am »
By taking advantage of the differential outputs of the AD9834, changing the amplitude does NOT change the DC offset.

Interesting! I did look at the AD9834, but because for me this is not really for me to DIY my own function generator, but more of a learning project as a first foray into electronics design, I opted for the simpler (and cheaper  ;)) part. In the same vein, to reduce the scope of this for myself I didn't really want to deal with arbitrary DC offset, so I limited it to essentially zero-centered or not, since adding centering off the fixed offset AD9837 isn't too bad.

Just curious, what is the purpose of hex inverters on the digital output? Seems to me the double inversion in and of itself isn't useful, so it must be providing some other property for you.
 

Offline Hammbone

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Re: DDS Function Gen Layout Review
« Reply #3 on: October 18, 2023, 05:58:09 am »
Why do you have a 50 ohm parallel termination at the output? I would think you would want it to be a 50 ohm in series with the output. That is typically how most signal generators work.
« Last Edit: October 18, 2023, 06:18:12 am by Hammbone »
 

Offline newbrain

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Re: DDS Function Gen Layout Review
« Reply #4 on: October 18, 2023, 08:40:15 am »
Have a look at the Function Generator I built using a AD9834 and screen captures of the waveforms:
   https://www.eevblog.com/forum/testgear/looking-for-lt$50-function-generator/msg3082494/#msg3082494
(Attachment Link)
I have also built something based on the AD9834, quite similar in many respects.
I use a balanced filter directly on the DACs outputs, to avoid feeding extra stuff to the output amp, though.
I'm also using a dual DAC to control the output amplitude (via biasing of the current setting resistor) and to add a programmable offset to the output waveform.

For higher quality (14 bit DAC) and more control in amplitude and phase I'm now using an AD9954, nice little ($$$) DDS - I'm using the phase and amplitude controls,  at 384 KSamples/s, to recreate an SSB signal at any freuency.

Just curious, what is the purpose of hex inverters on the digital output? Seems to me the double inversion in and of itself isn't useful, so it must be providing some other property for you.
The four inverters are there to provide a 50 Ω output impedance, given by the 4 × 200 Ω resistors parallel; ¼ of the output impedance of the inverters needs to be added, but it's in general quite low, in the order of a few ohms, so this is good approximation.
The extra inverter driving the 4 is probably not necessary, but does not hurt.

My major problem with that setup for the square wave is that at higher frequencies the duty cycle is not 50% (and not even constant, periodically jittery?), as it takes the MSB of the phase word Edit: no, of the sin output, but the consideration still holds.
The AD9834 provides a comparator that can directly square the DAC output, with better results.

Yeah, no. Perhaps my brains are old and scrambled (cit), mixing up the 9834 with something else. The comparator output and sign bit are on the same pin, SW selecatable, so all is good (sign for lower F, comp out for > 4 MHz). Sorry for the bad info.
« Last Edit: October 18, 2023, 09:21:16 am by newbrain »
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Offline MarkF

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Re: DDS Function Gen Layout Review
« Reply #5 on: October 18, 2023, 04:58:37 pm »
Interesting! I did look at the AD9834, but because for me this is not really for me to DIY my own function generator, but more of a learning project as a first foray into electronics design, I opted for the simpler (and cheaper  ;)) part. In the same vein, to reduce the scope of this for myself I didn't really want to deal with arbitrary DC offset, so I limited it to essentially zero-centered or not, since adding centering off the fixed offset AD9837 isn't too bad.

I understand trying to save money.  But, have you considered just HOW HARD it is going to be to hand solder a 10-LFCSP-WD package.   :scared:

My major problem with that setup for the square wave is that at higher frequencies the duty cycle is not 50% (and not even constant, periodically jittery?), as it takes the MSB of the phase word Edit: no, of the sin output, but the consideration still holds.
The AD9834 provides a comparator that can directly square the DAC output, with better results.

Yeah, no. Perhaps my brains are old and scrambled (cit), mixing up the 9834 with something else. The comparator output and sign bit are on the same pin, SW selecatable, so all is good (sign for lower F, comp out for > 4 MHz). Sorry for the bad info.

Ya.  I looked at using the on-chip comparator (after PCB was built) to solve the jitter of the sign-bit output.  But, the 4MHz freq limit is a non-starter.  I can use something external for now.  If I decide to build a new PCB, I can look for a suitable comparator at that time.
 

Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #6 on: October 18, 2023, 05:41:20 pm »
I understand trying to save money.  But, have you considered just HOW HARD it is going to be to hand solder a 10-LFCSP-WD package.   :scared:

Haha yeah, I did notice that. I plan to use solder paste for that part in particular. I realize now you can't see, but I put a fill on the underside of the AD9837 footprint too:



So using solder paste and being able to heat the backside for the GND pad, I'm hoping it's not too bad
 

Online Kleinstein

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Re: DDS Function Gen Layout Review
« Reply #7 on: October 18, 2023, 06:15:41 pm »
The series termination at the output is definitely a thing to change. Most OP-amps do not like driving a higher capacitive load or unterminated cable.

The digi pot in the gain setting part may not be ideal because of parasitic capacitance at the inverting input. It is also usually better to use both sides of the pot and not just a adjustable resistor.
Coarse amplitude settings (e.g. 20 dB steps) are usually better done with switches or relays, possibly even at the very output after the amplifier. At the relatively low frequency aimed for this may not be such an issue, but it would add some protection and reduce noise at the lowest amplitude setting. The DC offset is often better set after the gain, so one could get a large offset also with a small amplitude. So it would be more like a fixed DC correction and than gain and only at the end a variable DC offset to add.

The filter after the DDS is rather minimalistic. This may not work well with the slower A version and > 1 MHz.  Usually one has a higher order LC filter to get a little sharper cut off, even if this distorts the triangle. The triangle waveform will no be  very good at higher frequency anyway and for an at least somewhat better triangle one may want the faster B version of a faster chip like the AD9834.

The square wave, with the AD9837 would not longer be very sharp edge, as it also goes through the filter. The square wave from just the MSB also has quite high in jitter -  for a low jitter square wave one would have to go via sine wave, LP filter and comparator, e.g. like included with the AD9850  - but these don't have the triangle anymore.

The max1044 and similar switched capacitor supply chips are producing quite some supply spikes on both the input and output. They usually need careful decoupling and maybe added LC or RC filter stages for the input power and output.

For the layout, the few traces on the blue layer cut the ground plane to pieces and can make a good slit antenna. A ground plane usually does not like long cuts by traces running inside.

I would like more space between U5 and U6 to ease on soldering. The output amplfier may also want a bit more copper area connected to the supply pins, that can help cooling. The higher speed OP-amps tend to run quite warm, especially when driving a high load like 50/100 Ohms.
 

Offline MarkF

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Re: DDS Function Gen Layout Review
« Reply #8 on: October 18, 2023, 06:57:19 pm »
I would like more space between U5 and U6 to ease on soldering. The output amplfier may also want a bit more copper area connected to the supply pins, that can help cooling. The higher speed OP-amps tend to run quite warm, especially when driving a high load like 50/100 Ohms.

Yes.  I used a LM7171 in a SOIC package and it gets very hot driving a 50Ω load. 
I limited my output to 2Vp-p and a DC offset of +/-2.5V to reduce the op-amp heating. 

You WILL have over heating issues and should take measures to reduce it.
 

Online temperance

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Re: DDS Function Gen Layout Review
« Reply #9 on: October 19, 2023, 01:52:17 am »
Why do people insist on drawing schematics by cramming different building blocks into rectangles and then proceed to connect those together with net labels?

It makes schematics unreadable.
 
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Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #10 on: October 19, 2023, 02:59:17 am »
The series termination at the output is definitely a thing to change. Most OP-amps do not like driving a higher capacitive load or unterminated cable.

...

The filter after the DDS is rather minimalistic. This may not work well with the slower A version and > 1 MHz.  Usually one has a higher order LC filter to get a little sharper cut off, even if this distorts the triangle. The triangle waveform will no be  very good at higher frequency anyway and for an at least somewhat better triangle one may want the faster B version of a faster chip like the AD983

The max1044 and similar switched capacitor supply chips are producing quite some supply spikes on both the input and output. They usually need careful decoupling and maybe added LC or RC filter stages for the input power and output.

For the layout, the few traces on the blue layer cut the ground plane to pieces and can make a good slit antenna. A ground plane usually does not like long cuts by traces running inside.

I would like more space between U5 and U6 to ease on soldering. The output amplfier may also want a bit more copper area connected to the supply pins, that can help cooling. The higher speed OP-amps tend to run quite warm, especially when driving a high load like 50/100 Ohms.

So, something more like this?

1904988-0

The reason I originally had so little vertical space in the opamp area was because the top of my board was about level with R5, originally. With the movement of SW2 up there though, I see no reason not to take advantage of the space to address some of your concerns.

It is also usually better to use both sides of the pot and not just a adjustable resistor.

I'm not too sure I know what you mean here, would you be able to draw a quick napkin diagram?


Thanks for taking the time to leave some detailed feedback, appreciate it!  :-+
 

Offline Doctorandus_P

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Re: DDS Function Gen Layout Review
« Reply #11 on: October 19, 2023, 07:41:29 am »
First, the schematic looks well organized. No overlapping things. Divided in functional blocks. Signal flow from left to right, voltages from top to bottom.
I also like the bigger texts for quickly identifying schematic sections, but I don't like the yellow boxes. Those boxes add nothing that a bit of whitespace on the schematic does not make equally clear, and they tend to absorb a lot of time during schematic design and maintenance.

Separating analog and digital GND planes is a deprecated practice though. Using a single solid GND plane and combining that with some physical separation between the analog and digital sections is nearly always a better solution. Take for example the control lines to U5. The return paths for these signals have to make a detour to wherever the connection between the GND planes is. Noise generating U4 is now also quite close to the analog section. You have a quite big PCB. It's easy to have multiple centimeters of distance between the analog and digital sections by moving those sections apart.

And why use an USB to serial converter IC? Your STM32L053 has onboard USB. There are probably plenty of examples to use it as a CDC device. USB may be difficult to get going at first. But you can at least route the USB wires, and then use some resistors (just like R6 and R7) to either use U4 or the USB of the STM32 directly.
I also sort of like the jumper for current measurement, but it is also a possible failure point. I would probably add a shunt resistor directly on the PCB, or add a "normally closed solder jumper". If you more projects with USB, it is probably worth it to have the ability to have an adapter cable (or PCB) so you can directly measure current through the USB cable. Especially for the first power up, it's also handy to power it from a current limited power supply.

I don't see a crystal anywhere on the PCB. This may work (RC oscillators are getting better) but they generally still have a 1% error (which is acceptable for Uart). But watch out for temperature differences.

I don't see any PWR_FLAG symbols, and some of the uC pins do not have "No Connect" crosses. Did you run ERC?
I also prefer to break out unused pins to some sort of pads, and often add an experimentation area (with separate pads) to be able to easily make modifications. Especially for prototypes.

As Hammbone already mentioned. R3, the 50 Ohm resistor does not make much sense. The output impedance is determined by U6B, the LMH6634 opamp. R3 just draws extra (too much?) current from the opamp output.

I also like to have SW1 and SW2 close together, so you can both push them with a single finger.
Add a KiCad logo, your own logo, and a serial number or date to the PCB.
Add texts to the Silk screen (legend) to identify things: Functions of switches. Function of connectors. pinout of the programming pins.

I see you already moved a lot of the tracks to the top side. This is good (For EMC reasons), but you can move more of them to the top. In general it's better to keep the GND plane uninterrupted, even if it means detouring signals on the other side. (Except for some critical signals, but your design does not have these). Both Rick Hartley and Robert Feranec have made good youtube video's about the importance and quality of GND planes. I also don't like the hatched GND plane. Solid copper GND plane shortens the return path of signal currents. You can balance the amount of copper on both layers (against warping, although that is not such a big issue as it used to be) by adding more copper on the top too.
 

Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #12 on: October 19, 2023, 01:48:37 pm »
Separating analog and digital GND planes is a deprecated practice though. Using a single solid GND plane and combining that with some physical separation between the analog and digital sections is nearly always a better solution. Take for example the control lines to U5. The return paths for these signals have to make a detour to wherever the connection between the GND planes is. Noise generating U4 is now also quite close to the analog section. You have a quite big PCB. It's easy to have multiple centimeters of distance between the analog and digital sections by moving those sections apart.

Wasn't aware this was the case. Was mostly following the latter portion of the following advice from the AD9837 datasheet (emphasis mine):

Quote
The printed circuit board that houses the AD9837 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. This facilitates the use
of ground planes that can be separated easily. A minimum etch
technique is generally best for ground planes because it provides
the best shielding. Digital and analog ground planes should be
joined in one place only.


If that's not considered good practice anymore, I would rather do away with it, makes it easier on me haha. Ope, also just realizing "minimum etch" did not in fact mean hatched. I'm not sure if I was just confused (very likely) or if an opamp datasheet recommended that.


And why use an USB to serial converter IC? Your STM32L053 has onboard USB. There are probably plenty of examples to use it as a CDC device. USB may be difficult to get going at first. But you can at least route the USB wires, and then use some resistors (just like R6 and R7) to either use U4 or the USB of the STM32 directly.

I originally started with the onboard USB, but really mostly because I wanted to. Also because since this part is pin compatible with some devices that don't have USB, I wanted to be able to swap STM32 more easily, since most of those parts support the bootloader on USART2 on PA2/PA3. Also, most (all?) of the nucleo boards I have use those for the ST-LINK VCP already, so even though it would be a small change to just change which UART it is using, this way it "just works ;)" on the prototype board.

EDIT: Oh and also this STM32 doesn't support bootloader over USB to begin with

I don't see any PWR_FLAG symbols, and some of the uC pins do not have "No Connect" crosses. Did you run ERC?
Yeah, but after reorganizing the schematic for some pin-changes after my first pass I forgot to do it again :scared:. Re added those and still passes  :-+

I also prefer to break out unused pins to some sort of pads, and often add an experimentation area (with separate pads) to be able to easily make modifications. Especially for prototypes.

Good idea

As Hammbone already mentioned. R3, the 50 Ohm resistor does not make much sense. The output impedance is determined by U6B, the LMH6634 opamp. R3 just draws extra (too much?) current from the opamp output.

Ok, so no resistor on the signal output, period? Just straight from opamp to BNC?

I see you already moved a lot of the tracks to the top side. This is good (For EMC reasons), but you can move more of them to the top. In general it's better to keep the GND plane uninterrupted, even if it means detouring signals on the other side. (Except for some critical signals, but your design does not have these). Both Rick Hartley and Robert Feranec have made good youtube video's about the importance and quality of GND planes.

Some if the issues I had here were with the difference in SPI pin orientation between the DDS and the digipot. I think by expanding the space in that portion of the board in general though, I might be able to alleviate that.

I also don't like the hatched GND plane. Solid copper GND plane shortens the return path of signal currents. You can balance the amount of copper on both layers (against warping, although that is not such a big issue as it used to be) by adding more copper on the top too.

Similar thing as before, given my inexperience I just blindly followed the DDS and opamps datasheet layout suggestions.

Thanks for the input!

As an aside: Is there a better way to sync my PCB and schematic if I want to re-annotate the schematic part numbers? Or should I not even care about that. The reason I ask is because right before posting, I had touched up the schematic, synced to PCB, and suddenly it thought I was missing half the board because the part IDs were no longer the same... had to go and hand verify/change most caps/resistors on the board.
« Last Edit: October 19, 2023, 02:45:29 pm by jgrossman »
 

Offline MarkF

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Re: DDS Function Gen Layout Review
« Reply #13 on: October 19, 2023, 03:32:22 pm »
As Hammbone already mentioned. R3, the 50 Ohm resistor does not make much sense. The output impedance is determined by U6B, the LMH6634 opamp. R3 just draws extra (too much?) current from the opamp output.

Ok, so no resistor on the signal output, period? Just straight from opamp to BNC?

No.  You want to provide a low-pass (reconstruction) filter and a 50Ω output impedance.

1905336-0
 

Offline Doctorandus_P

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Re: DDS Function Gen Layout Review
« Reply #14 on: October 19, 2023, 04:59:07 pm »

As an aside: Is there a better way to sync my PCB and schematic if I want to re-annotate the schematic part numbers? Or should I not even care about that.

In the Schematic Editor / Tools / Update PCB from Schematic [F8] process there are a few checkboxes. The first is Re-link footprints to schematic symbols based on their reference designators and this checkbox should be Off. When it is off, KiCad uses the normal method which are UUID's. That checkbox is only used when things got out of sync somehow, and the UUID connections need to be restored.
 
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Online Kleinstein

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Re: DDS Function Gen Layout Review
« Reply #15 on: October 19, 2023, 05:53:35 pm »
The normal way is to have a LC based elliptic filter directly after the DDS chip, so before any amplification. Amplitude setting and amplification would be after that.
Ideally the triangle wave would like a different (more Bessel type) filter. Better DDS/AWG geneators have this option with the sharper filter for sine wave to allow using higher frequencies, like 1/3 the clock.
With the Bessel type fitler one has to expect aliasing / artifacts maybe already at clock / 5 , but on the positive side the triangle wave is less distorted from phase shifts.
The filter looks similar to the simple LC low pass shown by markF, but with extra capacitors in parallel to the inductors to add zeros.

Directly from the fitler to the output is not ideal as the filter needs a well defined output load and would not work the same with an open output. Especially at the lower frequencies one may use the generator also without load matching at the output, e.g. connect to a higher impedance amplifier / scope.

The output would have a series resistor of some 50 ohm. Optional there could be a relay for a 50 ohm resistive attenuator (e.g. -20 dB) directly at the output.
Directly from an OP-amp to a BNC ouput is gnerally a bad idea - many amplifiers can already oscillate from the capacitance of 2 m of coax cable ( ~ 200 pF), the faster ones even earlier.
 

Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #16 on: October 20, 2023, 05:35:25 am »
The normal way is to have a LC based elliptic filter directly after the DDS chip, so before any amplification. Amplitude setting and amplification would be after that.

So, something like this instead of the RC filter (or in addition to?):



I used this tool https://markimicrowave.com/technical-resources/tools/lc-filter-design-tool/. I placed a 200Ohm resistor after the filter to match the 200Ohm resistor on the AD9837. I also changed to a 16MHz clock to give me more ceiling room for filtering out clock images on the output without affecting my signal as much.

I supposed I could also lay out a bessel-type filter in parallel with this one, and switch between the two using another one of those TMUX121 SPDT switches for better output on triangle, but not sure if it is worth it since with a 16MHz filter my output is max 1/8 the clock (or less, since I am probably going to pull back to 1MHz max)

Would it be best to put a filter on the opamp output, too?
« Last Edit: October 20, 2023, 05:51:33 am by jgrossman »
 

Online Kleinstein

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Re: DDS Function Gen Layout Review
« Reply #17 on: October 20, 2023, 08:32:21 am »
The LC filter usually needs a defined load, so this time the 200 ohm towards ground. Usually one would have a higher filter, like one more such fitler step.
The output would than get an amplifier (OP at the output).
A 2nd path and 2nd filter is a bit tricky as the 2 can effect each other as the Vout is not a pure voltage output with zero output impedance.
Not sure how important the quality of the triangle wave is - it would not be great anyway.
The possibly more relevant point could be a low jitter square wave one a separate output derived from a comparator off a sine wave.

If costs are an isse one can also use cheaper switches than TMUX121 etc.   e.g. TMUX4053 and even 74HC405x are possible too. It should be possible to combine the DC offset corection and gain setting with 1 OP-amp.  For the coase gain after the amplifier I would even consider a crude, old style mechanical switch  (DPDT).
 

Offline duak

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Re: DDS Function Gen Layout Review
« Reply #18 on: October 20, 2023, 03:05:06 pm »
It shouldn't affect the layout much but the fc of the reconstruction filter must be 1/2 or less of the sampling clock to be of any use.  Sampling theory predicts that aliases of the desired waveform exist imaged around the sampling clock, eg. with a 16 MHz clock the desired 1 MHz sine wave will also have 15 and 17 MHz components.  Selection of the filter's fc is determined by how flat the response is for the desired waveform vs how much to attenuate the aliases.  A 1 MHz triangle wave is going to need a fairly complex filter so as to look not too rough.
 
 

Online Kleinstein

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Re: DDS Function Gen Layout Review
« Reply #19 on: October 22, 2023, 08:07:46 am »
It is a little strange to have the DDS chip with USB supply, but not µC to control the frequency and other settings.
It would make more sense to have a PCB similar to the 1st. suggestion with DDS chip, µC and a minmal amplifier.

I don't think the series resistor R4 is right ar the input of the fitler, I would more expect a resistor to ground.
The comp pin wants a separte capacitor to ground, not a link to the supply.

The filter part should have a much more careful layout, likely with also ground on the top side.
The filter is designed for 200 ohm output impedance, while the usual BNC / SMA connections are for 50 ohm cables.
If needed one could change the filter to 50 ohm impedance, though this would mean a rather small amplitude (1/4 as with 200 ohm as the DAC is a current source).

Even with the +- outputs, when using only 1 the output signal still has an offset. So one has to deal with this. The AD9850 data-sheet may give some hints on how to handle this: use the average of Iout+- to get the offset and than subtract it in an exra step.
 

Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #20 on: October 22, 2023, 08:14:40 am »
It is a little strange to have the DDS chip with USB supply, but not µC to control the frequency and other settings.
It would make more sense to have a PCB similar to the 1st. suggestion with DDS chip, µC and a minmal amplifier.

I don't think the series resistor R4 is right ar the input of the fitler, I would more expect a resistor to ground.
The comp pin wants a separte capacitor to ground, not a link to the supply.

The filter part should have a much more careful layout, likely with also ground on the top side.
The filter is designed for 200 ohm output impedance, while the usual BNC / SMA connections are for 50 ohm cables.
If needed one could change the filter to 50 ohm impedance, though this would mean a rather small amplitude (1/4 as with 200 ohm as the DAC is a current source).

Even with the +- outputs, when using only 1 the output signal still has an offset. So one has to deal with this. The AD9850 data-sheet may give some hints on how to handle this: use the average of Iout+- to get the offset and than subtract it in an exra step.

Yeah, sorry I had deleted that post shortly before this response. I hadn't really put enough thought into what I wanted to do there, and also realized like you mentioned I would almost certainly want an on-board micro to control it, and that very quickly I would end up right where I started and the "evaluation board" would become the project again. Thanks anyways for the input. Do you know any resources I could study for laying out discrete filter elements?
 

Offline MarkF

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Re: DDS Function Gen Layout Review
« Reply #21 on: October 22, 2023, 01:19:35 pm »
...   Do you know any resources I could study for laying out discrete filter elements?

Have a look at Analog Devices application note: 
   https://www.analog.com/media/en/technical-documentation/application-notes/351016224AN_837.pdf
 
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Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #22 on: October 22, 2023, 03:12:13 pm »
...   Do you know any resources I could study for laying out discrete filter elements?

Have a look at Analog Devices application note: 
   https://www.analog.com/media/en/technical-documentation/application-notes/351016224AN_837.pdf

Extremely helpful, thank you.
 

Offline jgrossmanTopic starter

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Re: DDS Function Gen Layout Review
« Reply #23 on: October 23, 2023, 01:48:31 am »
I've decided to go ahead with using the AD9834 instead, which has basically come down to a redesign. The FS_ADJUST and complementary outputs lend themselves well to being controlled by two STM32 DAC channels to set the offset and amplitude (analogous to MCP4812 in markyF's design). This removes the need for the centering analog switch and the digipot gain control.

I've attached my very WIP schematic, and have a few specific questions:

  • Is there a way to simplify my output selection circuit? I want to use a SPDT relay to switch between the comparator and IOUT signals so they can utilize the same BNC. I also want to use another SPDT relay to switch between the output BNC and a loopback to the MCU to self calibrate the DC offset (and maybe gain?) in software with one of the ADCs on the MCU.

    Here is what I have:

    1908648-0

    One issue I'm coming up against is having a safe default state of the system. I don't really want to pump just whatever garbage is in the AD9834 registers to the BNC, and especially not back to the MCU. For this reason, I'm using the SPST-NO relay in between the comparator-iout switch and the calibration-bnc as a kill switch. Something about this smells, and was wondering if there is a better way. I thought about using the SHDN input of my ±9V rail generation to just not apply rails to the opamps, but this seems like it would damage them.

  • Regarding the following:

    I don't think the series resistor R4 is right ar the input of the fitler, I would more expect a resistor to ground.
    The comp pin wants a separte capacitor to ground, not a link to the supply.
    ...
    If needed one could change the filter to 50 ohm impedance, though this would mean a rather small amplitude (1/4 as with 200 ohm as the DAC is a current source).

    • The series resistor comes from copying this output for a 37.5MHz low pass filter:

      1908654-1

      Am I misinterpreting this somehow? I notice when I export to LTSpice, it's done slightly differently, with the AC source having an intrinsic 50Ohm series resistance. This would still indicate to me a series resistor, since the AC source can be broken down into an ideal AC source and an ESR of 50Ohm.

    • For the COMP pin, that actually looks correct from the datasheet... wonder why markF is instead putting the capacitor to 5V?

    • How can I avoid the  amplitude loss in the low pass portion? Could I just use a fixed gain opamp circuit to compensate this known loss to bring it back up to what it was pre-filter? Or is there another typical solution.

  • I want to be able to do amplitudes of maximum 5Vpp. I noticed markF in another topic noted that the LM7171 got hot at 2Vpp, and wondered if a small passive heat sink like these would be enough to alleviate this:

    https://www.aliexpress.us/item/2251801297859915.html


PS: What is the forum etiquette on changing topic titles? This has clearly devolved from "check my layout?" to "help me with my design", but I'm not sure if it's considered OK to change the title to reflect that.
« Last Edit: October 23, 2023, 02:33:54 am by jgrossman »
 

Offline MarkF

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Re: DDS Function Gen Layout Review
« Reply #24 on: October 23, 2023, 03:42:31 am »
Just a couple thoughts:
  • There are two versions of the AD9834.  One is 75 MHz (AD9834CURZ) and the other is 50 MHz (AD9834BRUZ).  Design accordingly.  I designed for and used 48 MHz clock since that was the max clock frequency of a PIC18F2550.  You don't really need an elaborate reconstuction filter.  The results in my screen captures where with a simple 3rd order Chebyshev filter.

  • The LM7171 only got hot driving a 50Ω at 5Vp-p.  But, you can't count on always having a high impedance load.  I'm considering a DIN package instead of the SOIC.  The bigger package would dissipate more heat.  I also didn't tie the 'NC' pins to the ground plane which will also get rid of heat.  Proabaly a more robust output drive circuit needed here.

  • The comparator output with its frequency limitation is pretty much useless.  Just forget it has one.
     If your thoughts were of a square wave output and jitter, you need another solution.

  • I used the 'sign-bit' output on a second output BNC as my square wave (the jitter is not a big problem for me).

  • The 2nd BNC is to provide more functionality over and above the capabilities of the AD9834.
    Examples:  a trigger pulse when doing a frequency sweep, a PWM output from the PIC18F2550.  There are probably more things you could do (i.e. maybe amplitude modulation) but I ran out of program memory in the PIC18F2550.

  • If you update the AD9834 frequency at a fixed rate from a processor timer interrupt, you can provide a very nice frequency sweep; up or down.

  • The AD9834 has a high impedance output state (see my attached notes).  Parallel it with a MCU pin and careful software programming (i.e. break-before-connect) and you don't need any switches.  I forgot to buffer my digital output, so definitely add the hex-inverter for the drive capability.

  • Microchip also makes the MCP4822 which are 12-bit DACs if you want more resolution.  All three verisons are pin compatible.  I'm actually using the 8-bit version.  Correction, I did use the MCP4812.

  • Depending on where you put the reconstruction filter, you should be able to loop back the signal to a MCU analog input pin without any analog switches.  Even adding an op-amp to buffer the feedback signal.  The output of the AD9834 is well behaved.  At least the way I have it and the MCP4812 programmed at power up.  (As you can probably see, I'm not a big lover of analog switches.  In your case, I don't think you need them.)

« Last Edit: October 23, 2023, 06:46:55 am by MarkF »
 


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