High current 'vias'

[sahko123]

I have a two layer board that I'm designing for low volume production (50-100) where there is a power trace that i need to bring between layers because of the nature of the design and insted of using via stitching i wanted to use a plated through hole and then fill it with solder. Is this an effective solution or should i just do via stitching?

[ejeffrey]

How much current?  What other constraints.

Filling a PTH with solder will increase its current capacity.  Even though solder doesn't have great conductivity, the cross section is enough higher it makes a significant contribution.  But generally just using more PTH is easier to achieve the needed current unless you are pressed for space.

You may not even need them.  Vias can conduct a lot of current. A via conducts along its entire perimeter which is 3.14x the diameter of the hole.  The plating is thinner than your outer layer copper foil but you can still have a fair cross section of copper.  Also, vias are short and have good thermal conduction to the traces/planes on either side so a small local reduction in cross section is not necessarily that damaging.
 

[sahko123]

its not even that much current its more so to just get half decent low impedance just didnt really think that vias could handle much more than signal currents without having to have a good few

[ahbushnell]

There is a free tool from Saturn PCB Design.  You can calcuate current ratings for traces and via's. Plus many other things for PCB design.   It's called PCB tool kit. 

http://saturnpcb.com/contact.htm

[cdev]

Because of the skin effect the impedance at RF of a filled in hole may be the same or even higher at UHF or above  than a similarly sized PTH. But they stil work fairly well and its better to have them where you need them than not.

[T3sl4co1l]

Roughly speaking, solder filled vias handle about twice the current, or thermal vias about twice the heat (half the R_theta), same thing.

Exact ratio of course depends on plating thickness, diameter, and solder alloy (lead-free is better than leaded).  Easy to calculate, just punch in the conductivities and dimensions.

Easy enough to fill vias (or thru pads, same thing to the fab) with solder in a wave process, just use a large enough unmasked annulus that it picks up solder reliably.

Tim

[T3sl4co1l]

Because of the skin effect the impedance at RF of a filled in hole may be the same or even higher at UHF or above  than a similarly sized PTH. But they stil work fairly well and its better to have them where you need them than not.

It's always going to be less.  It just might not be much less.

The top and bottom surface may have higher resistance due to the gaping hole and/or solder cover.  But currents don't flow there, because, how would you have image currents on an open (not facing a ground plane) surface?

Tim