Author Topic: Design of SMPS - Not sure what these spikes are being caused by.  (Read 5491 times)

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Offline Zog

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Hi all,
I am making a boost converter for nixie tubes and have got mine running at 185VDC at 140mA's at the moment.
Yes .. I know .. "just how many nixies are you running !" ... well none yet. I just want to see how far I can push the design.

Edit: for this circuit.




My scope is showing these spikes on the HV feedback line.





And these on the Mosfet gate.





After half an hour the vpp was also increasing from almost nothing to this.



Even at only 30mA's I still see the spikes on the feedback line.



The gate does not look so bad though.





Any clues on where I can find out more on this subject would be greatly appreciated.

Cheers,
Phill




« Last Edit: May 20, 2018, 09:55:02 am by Zog »
 

Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #1 on: May 14, 2018, 02:01:04 pm »
Could it be my snubber ? Perhaps ?
But what could explain the missing switching in the mosfet ?
 

Online Tomorokoshi

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #2 on: May 14, 2018, 03:03:04 pm »
Can you post pictures of the schematic and the actual test setup?
 
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Offline rx8pilot

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #3 on: May 14, 2018, 03:37:51 pm »
The only way to have an actionable comment is to share your schematic, the physical build, and the test setup.

I would hazard a guess that most of what you see is noise from the measurement itself, the rest of it is dominated by how you built (PCB layout) the circuit. Once you have considered those two major elements, you may need a simple RC snubber to damp the ringing on the switch node.

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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #4 on: May 14, 2018, 03:43:27 pm »
I am building this guys design and have used his layout.

https://jan.rychter.com/high-voltage-power-supply-for-nixie-tube-projects

The test setup is not ideal.

Will try the small clips on the probe tomorrow and try again.
Using the crocodile lead is probably making an antenna for sure.
Thanks for the reminders !
 

Offline rx8pilot

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #5 on: May 14, 2018, 04:43:36 pm »
If you don't have one of these, you can make one easy enough with solid wire and a screwdriver slightly smaller than the tip of the probe.

Also, consider using a load resistor. A no-load condition will change the characteristics of the SMPS.
Factory400 - the worlds smallest factory. https://www.youtube.com/c/Factory400
 
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #6 on: May 14, 2018, 10:23:13 pm »
Yes .. I have those for the probes.
The load is about 1.4k through a 30w adjustable wire wound ceramic resistor and a 5W ceramic resistor. Not ideal for such a huge output, and the poor old little 5 watt resistor gets so hot it melts the solder on the connection. I am truly amazed that it has not blown up yet. They are tough little buggers.
Will take a few more measurements today and report back.
Thanks for the tips.
« Last Edit: May 14, 2018, 10:26:12 pm by Zog »
 

Offline Phoenix

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #7 on: May 14, 2018, 11:31:54 pm »
Something doesn't seem right to me on those waveforms. Are you able to probe the gate and the output voltage (if safe to do so with your scope) simultaneously? Also, what does the voltage across your current measurement resistor look like?

Do you have the voltage doubler in place? If so can you try without it?

Can you attach YOUR schematic and YOUR photo?
 
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #8 on: May 15, 2018, 12:15:38 am »
Will try the measurements you suggest.
And the ones in the other post.

Yes the voltage doubler is in place.
I can remove it.

My schematic is the same as the one I linked to.
I am using testpoints 1,2 and three in that circuit.

My photo won't show you much as it's the same as his board.
Infact it IS his board ... just with a different mosfet, inductor and lower current sense resistors.
 

Offline Phoenix

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #9 on: May 15, 2018, 12:17:49 am »
The point about YOUR schematic is that he lists a lot of parts as optional. Maybe you can copy his schematic and take out the parts that are not there.
 
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #10 on: May 15, 2018, 12:39:23 am »
Oh... I see your point.
All the parts he has marked as optional are in the circuit.
The inductor is a torroid.
By the way, the "different inductor" I mentioned in the above post is not a different value .. just a different Imax and Isat .. better in both, same value 4.7uH.
That's it. No other changes.
« Last Edit: May 15, 2018, 12:43:10 am by Zog »
 

Offline GerryBags

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #11 on: May 15, 2018, 12:46:52 am »
This document shows some of the parasitic effects that SMPS can be subject to, my hunch is that is the diode recovery time letting through a spike before charge is drained from the p-n junction.

http://www.ee.bgu.ac.il/~smps/slides/4/DCDC_5_triple.pdf

Here's a pdf from ON about diode reverse recovery time and the effects it can have. Apparently it is a common reason that switchers fail EMI tests:

https://www.fairchildsemi.com/technical-articles/Understanding-Diode-Reverse-Recovery-and-Its-Effect-on-Switching-Losses.pdf

And for the most readable take on the subject ever, here is the classic Jim Williams app-note SMPS for poets, where he covers ways of taking measurements on them:

http://www.analog.com/media/en/technical-documentation/application-notes/an25fa.pdf
 
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #12 on: May 15, 2018, 01:30:10 am »
Thanks GerryBags for the links.

I had a very quick look through and will study them properly later but they look interesting, though I know most of the stuff already. NOT an expert .. but enough to get by.

After reading those I would really like a oscilloscope current probe but can't afford a proper factory one.
I was reading somewhere else that you can home brew these from ferite beads. Anyone know of a site where I can find more information ?

Re: your hunch on the diode recovery time.

Here is the relevent specification from the datasheet for the US2GA. The supply is "supposed" to be operating at around 50kHz ... so this diode should be fast enough ?



Could that also be why the square wave at the gate is the shape it is in this shot ?



 

Offline T3sl4co1l

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #13 on: May 15, 2018, 01:51:07 am »
The schematic is fine if the voltage doubler is not used.

Absolutely no accommodation has been made to interface to a voltage doubler, and it should not be used(!).

A doubler is incompatible with a peak current mode supply, at least for any reasonable output current.  Instead, use a tapped inductor (transistor switches the tap, supply to one end, diode to the other, "long" end), so that the flyback voltage is higher than what the transistor sees.

Layout:
The connectors being in different locations ensures that, if there is ground loop voltage, it is present between them.

The ground plane is not solid, having a huge slot alongside C16, and is open under L1 and L2.  (There is no need or desire to open ground under an inductor.)  This puts a fraction of the inductor voltage around those open areas, so there will be ground loop voltage present.

The biggest problem is trusting small, high voltage electrolytic capacitors for output filtering, which they're terrible at.  Film caps would do better there, and you'll still need a bit of LC filtering to deal with the spikes that are let through by cap ESL.

As long as the controller and regs are fine with the environment, all you really should need to do, as far as spikes, is bring out all the inputs and outputs to a common ground plane, and add LC filters.  Not much L is needed.  Use ceramic chip caps (low ESL).

Tim
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #14 on: May 15, 2018, 02:07:50 am »
Thanks for the information Tim,
Points noted on the layout.
And makes perfect sense!

I will modify the board with the ground plane recommendations you have made.

The C16 slot is just to isolate the low voltage from the HV according to the designer. Which makes sense to me.
I would imagine that it also separates the HV and LV side ground planes which is good right ?

Now.. off to search for a torroid with a tap, If such an animal exists in the wild. Somehow I doubt it.
EDIT: ... 2 toroids in series... DOH  :palm:

Hi Ho, Hi Ho it's off to Digikey I go  :)

P.S. I really appreciate all you fella's putting your 2 cent's in to this.

EDIT: not quite sure what you mean about how to arrange the circuit.
Quote
A doubler is incompatible with a peak current mode supply, at least for any reasonable output current.  Instead, use a tapped inductor (transistor switches the tap, supply to one end, diode to the other, "long" end), so that the flyback voltage is higher than what the transistor sees.


« Last Edit: May 15, 2018, 05:54:55 am by Zog »
 

Offline T3sl4co1l

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #15 on: May 15, 2018, 06:51:49 am »
I would imagine that it also separates the HV and LV side ground planes which is good right ?

If you're going to use slots, better to position the LV section opposite the HV area, not hugging around it.  That is, put the +12V in the middle.

Quote
Now.. off to search for a torroid with a tap, If such an animal exists in the wild. Somehow I doubt it.
EDIT: ... 2 toroids in series... DOH  :palm:

Hi Ho, Hi Ho it's off to Digikey I go  :)

Nooo, not in series, you need coupling!

Winding coils isn't hard, otherwise look for tapped inductors.  DK has 1:1 to 1:10 ratios stocked, IIRC.  Look for the same "primary" (smaller winding) inductance as the original design.  You probably won't find toroids, but there are lots of ferrite and molded SMT inductors, and inverter transformers (use the "secondary" as primary, e.g. a 120 (or 85-265) to 12V transformer would do very nicely here).

Incidentally, "torroid", is that phonetic, or is there a regional or language influence?  It's a very common typo but I'm unsure and curious why...

Quote
EDIT: not quite sure what you mean about how to arrange the circuit.
Quote
A doubler is incompatible with a peak current mode supply, at least for any reasonable output current.  Instead, use a tapped inductor (transistor switches the tap, supply to one end, diode to the other, "long" end), so that the flyback voltage is higher than what the transistor sees.

Consider what happens in the instant the transistor turns on: it draws a huge gulp of current through both doubler capacitors.  The controller detects this and shuts off the pulse short.  Result: huge EMI (hard switching, high peak currents), very low output power (low duty cycle).

Once it's up to voltage, it can be okay, because the current will be small when the capacitor voltage is very close to the peak-to-peak voltage already.  But it won't take much load to pull it down into the range where it falls over.

Whereas a tapped inductor, just works the way the circuit normally does, and you can get nearly any voltage you want. ;)

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #16 on: May 15, 2018, 07:16:54 am »
Torroid  is the shape .. so I just call them that. Most people I know do too. Toroidal is of course the correct term though, I guess .

Back to the chase.

I am replacing that LV design and putting in a better one. That one has no input protection UV or OV and I am going to need a VDD of 12VDC for the Tube HV drivers.
I have already moved it out of the way so I can do that. No board made yet until I get it this part right.

Code: [Select]
Nooo, not in series, you need coupling!Still don't get it. Coupling ? You mean I have to use a transformer ... right ?

The thing is, the way it is at the moment drawing that amount of current it gets as hot as hell.
I mean really hot. the mosfet gets to about 85c and the current sense resistors get to 80c !
The "Torroidal" inductor gets to about 50c ... but that is not on the board so that's fine.

Obviously efficiency is not ... err great  ;D

Man this thing can pump out some current though even if it's not efficient !
The 5w load resistor gets to 200c
This was all tested at 25c after only 30 minutes.
Output dropped from 140mA to 135mA after that time ... so I guess the inductor was having a hard time and was derating.

Will start looking for transformers. Though I am not really sure how I am going to wire it up.

Thanks again for your interest Tim,
Phill


 

Offline T3sl4co1l

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #17 on: May 15, 2018, 07:29:46 am »
Yes, a transformer.  Well, sort of.  A transformer that stores energy (in other words, a tapped, coupled inductor).  Not an ideal transformer (which does not store energy and has infinite inductance)! :)

Part of the problem is huge input currents and awkward duty cycles, because the circuit attempts to make a large voltage ratio between input and output.  The tapped inductor fixes this, making it a very normal (ideally 1:1.5 to 1:3 ratio) converter, as far as everything else is concerned.

Tim
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #18 on: May 15, 2018, 07:31:22 am »
Got it !  :-+
Looking on DK now
 

Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #19 on: May 15, 2018, 09:14:53 am »
Still looking.
The 1:1 ratio inductors will cause the same problems so they are out.

Code: [Select]
Once it's up to voltage, it can be okay, because the current will be small when the capacitor voltage is very close to the peak-to-peak voltage already.  But it won't take much load to pull it down into the range where it falls over.
Whereas a tapped inductor, just works the way the circuit normally does, and you can get nearly any voltage you want. ;)

For the same reason above I assume ?

Just checking

EDIT: ... stupid question of course it will. Just can't find one that is suitable.
Would someone please be good enough to rub my nose in one that would do the job that is reasonably small ? PCB mount SMT or through hole ?

EDIT AGAIN:... I think this is an impossible task.

For something
1. smallish
2. the right current rating
3. the right voltage rating
4. the right saturation rating
5. the right inductance.

This came close but no cigar.

https://www.digikey.com.au/products/en/transformers/switching-converter-smps-transformers/168?k=&pkeyword=&pv1393=21&FV=1f140000%2Cffe000a8%2C15c0001b%2C15c0002d%2C15c0004b%2C15d00006&quantity=0&ColumnSort=0&page=1&stock=1&nstock=1&pageSize=500

Perhaps a snubber on the switch node would be a possibility ? At least that would knock of the EMI right ?

Even More EDITING:

"For those playing along at home"  ;D


Direct link to the article. https://www.fairchildsemi.com/application-notes/AN/AN-4162.pdf


« Last Edit: May 15, 2018, 11:40:25 am by Zog »
 

Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #20 on: May 16, 2018, 03:44:42 pm »
Still working on this stuff fella's
Tim has got me out of the bog hole I was in.
Will update you on progress as I incorporate his ideas into the new design.
 

Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #21 on: May 19, 2018, 07:22:18 am »
This is part of the circuit suggestions I paid Tim (T3sl4co1l) a few bucks for his time for.

I thought I would throw it out there before committing to it.



I see what he means now.

I have a few concerns though.
None of the inductors suggested have very high current Irms(A). The Irms(A) of the torroid I am using is 10A and even that gets hot.
So the question is will the design above still need a high current coupled inductor.

The way I see it is it is still charging the 4.7uf cap and the 10uH inductor so it needs to supply the current, right ?


Will the only thing this circuit do is reduce the ringing with coupled inductor and the snubbers
If that is the case can't I just use the existing circuit and just add the snubbers ?
Edit:...belay that. I have been working on something else for a few days and have not been concentrating on the one project.


The other question I have is if I use a coupled 4.7uH 1:1 inductor why use the extra 10uH one ?

Edit: Because the suggested 1:10 inductor is only 27uH  and I will need the extra 10uH ?
If I use a 1:1 I could leave it out ?


Edit: see above. One more question is what advantages or disadvantages are gained or lost by using a ratio of 1:3 or 1:X etc ?

Little bit confusing to me.
Little less confusing to me.

Anyway Tim is obviously an expert and I very much appreciate his work, but rather than pester him with messages privately, I thought it would be better for all, to continue this search for the high power design I am looking for publicly.

Edit: I read this again.
So I "think" I get it.
Quote
Part of the problem is huge input currents and awkward duty cycles, because the circuit attempts to make a large voltage ratio between input and output.  The tapped inductor fixes this, making it a very normal (ideally 1:1.5 to 1:3 ratio) converter, as far as everything else is concerned.

More Editing:

This is the datasheet for the 6235 1:10 Ratio

Not quite the same circuit example as Tim's above though.



Sorry about the crazy editing !  :P
« Last Edit: May 20, 2018, 05:52:49 am by Zog »
 

Offline T3sl4co1l

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #22 on: May 19, 2018, 02:02:01 pm »
None of the inductors suggested have very high current Irms(A). The Irms(A) of the torroid I am using is 10A and even that gets hot.
So the question is will the design above still need a high current coupled inductor.

*Glances back at the OP*, oh yeah, a couple amps will be needed, won't it.  Well, most of these are families, should be able to find something bigger SRF or LPD or whatever.  Or that inverter transformer is looking quite good, despite its size and cost. :)

Probably most of the heat in your toroid was core loss, so that it's practically irrelevant if the winding is rated 10A or 100A.  With a waveform that peaky, you get a lot of excess heating -- another good reason to use a tapped winding or transformer. ;)

Quote
The other question I have is if I use a coupled 4.7uH 1:1 inductor why use the extra 10uH one ?

Edit: Because the suggested 1:10 inductor is only 27uH  and I will need the extra 10uH ?
If I use a 1:1 I could leave it out ?

What extra 10?

Inductance depends on operating frequency and desired current ripple.  4.7uH might be enough, or you may need to raise the frequency, or deal with the higher ripple (increased losses, especially in the inductor and main filter caps).

I was looking for values near the original primary inductance, but I didn't check if that was consistent with the controller's operating point.  The datasheets for those controllers are very detailed, do take a look and double-check the original author's work. :)

Quote
This is the datasheet for the 6265 1:10 Ratio

Not quite the same circuit example as Tim's above though.



That's an interesting one.  Must be... self-excited oscillator, for single-cell battery or solar or thermopile or energy harvesting purposes?  So, the capacitors are there to help shift charge around, without having to put too many different windings on the poor little transformer.  Something like that.  It's not a good method to use at scale; you can get away with it at low voltages because, with so little voltage to begin with, you're going to get crap efficiency anyway (anything over 50% is good), and since you're only doing this for a couple watts at most, the parts are small and you can afford to overkill them a bit, so they'll tolerate hacks like turn-on switching into a capacitor load.

Notice the current path from MOSFET drain, through the transformer, coupling cap, sync rect, and output filter, back to ground.  When the transistor turns on, it delivers a huge gulp of current to charge that capacitor, which means big switching losses.

Tim
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Offline Zog

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #23 on: May 19, 2018, 03:03:32 pm »
Thanks for the reply Tim.
I am off to bed ... will analyse your answers after a good snooze.
Marked the 10uH inductor on the hand drawn circuit.
P.S. What inverter transformer ?
« Last Edit: May 19, 2018, 03:15:00 pm by Zog »
 

Offline T3sl4co1l

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Re: Design of SMPS - Not sure what these spikes are being caused by.
« Reply #24 on: May 19, 2018, 03:36:08 pm »
Oh yeah, just for extra filtering (same thing that appears on the other sheet).  You'll still want it regardless of switching inductor value, because current is going into and out of the circuit in pulses.

Tim
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