....and this evening I got the HV PSU prototyped.
I've got a bunch of these DG7-32 CRTs that I want to make oscilloscopes out of:
The preliminary circuit. A 30V-CT Secondary mains transformer provides unregulated rails of +/-~21V from which +/-12V regulated rails are derived for the LV circuitry while a high-frequency linear converter provides the HV rails. These are +200DC@30mA, -400VDC@1mA, -550V (floating, negligible load current) and 6.3VAC@300mA for the CRT heater. I was originally going to make a TL494-based SMPS, but just for fun I decided to do a linear high frequency converter both as a curiosity and because I figured that will be one less source of RFI in my "shack".
The supply is inherently soft-starting. Upon initial turn-on, the capacitor of integrating error amplifier U1 is discharged and the potential at the output of U1 jumps to the reference potential of 5V (as applied to the non-inverting input courtesy of U2. This isn't enough to forward bias D1 and inject a sufficient tail current into the long-tail pair Q1/Q2 which form a 22kHz LC sinewave oscillator. Q1/Q2 act as a limiting amplifier and the amplitude of oscillation (developed across L1/C4) is determined my the injected tail current. Positive feedback for oscillation is provided via C3. Transistors Q3 through Q11 form x11 Av power amplifier for driving the primary winding of the HF transformer.
U1 begins integrating in the positive direction and approx. 100mS later D1 becomes forward biased and sinusoidal oscillations across the parallel L1/C4 parallel tank circuit begin to grow, along with the HV rail potentials. Here is the resultant power-up response, the DSO plotting the positive +21V LV rail (yellow trace) along with the regulated +200V HV rail (blue trace):
And here is the 22kHz sinewave drive at the output of the power amplifier (as impressed across the transformer primary winding via DC-blocking capacitor C9) along with the primary current waveform. The latter is probed across a 0.1 ohm resistor in the primary winding ground return, so the 0.2V per division works out to 2A per division. Peak current is due to the rectified capacitor charging currents; primarily that of the +200V rail, which is the most heavily loaded and has the largest value capacitors.
EDIT: Oops, when this photo was taken the CH2 menu setting for the probe attenuation was set to X100 rather than X10 (I was probing the HV with a 100:1 probe prior). The scale is 200mV/Div. as stated above, not 2V/Div. as shown.
Finally, the prototype circuit under test. The white ceramic power resistors are for loading the rails to the design values. The one hanging off the transformer is a 22 ohm unit for loading the 6.3VAC filament supply (300mA) and the two in series are 6.6k in total for loading the +200V rail at 30mA. The -400V (CRT cathode) rail is loaded to 1mA by two series-connected 200k resistors. The multimeter is monitoring the 550V grid bias supply potential.
Because the mutual coupling isn't perfect (and neither is the rectification 100% efficient) and the supply is regulated against the +200VDC rail which is also the most heavily loaded, the primary drive is driven slightly higher than ideally required to compensate for the losses. This means that slightly less turns are required on the secondary windings for the remaining rail potentials than what would be governed by the turns ratios in an ideal situation. I arrived at the final number of turns the L4, L5 and L6 secondaries empirically (480t for L4 Vs 500t ideal, 19t for L5 Vs 22 ideal and 660t for L6 Vs 687.5 ideal).
I managed (just) to stuff all of the windings with adequate layers of insulation onto a ETD39 former. As all secondary supplies are of the half-wave rectified voltage-doubler configuration and the primary is AC-driven via a DC-block capacitor, no DC flows through any of the windings so core-gapping isn't required.
Tomorrow I'll get the Z-axis (intensity) amplifier prototyped along with the deflection amplifiers and hopefully the CRT wired up as well..........
Home
Help
Search
Login
Register
