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Offline ealexTopic starter

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Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« on: February 29, 2016, 11:48:10 am »
Hello

I'm working on a superheterodyne receiver from scratch and i'm struggling with the narrow band IF amplifier.
The first iteration behaved poorly - it would either have almost no gain or would just start oscillating at 100-200MHz.
It had ~ 4V of voltage between VCC and VE and ~ 3.5mA bias current. On 50 ohm the gain was at most 1 before starting to oscillate.

I'm trying to follow the design steps from here: http://my.integritynet.com.au/purdic/rf-amplifier-with-feedback.htm
The quality factors formulas are form
http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-071j-introduction-to-electronics-signals-and-measurement-spring-2006/lecture-notes/resonance_qfactr.pdf

On the new IF amplifiers i would like to use BFQ19S transistors ( have a bunch of them ): http://www.infineon.com/dgdl/bfq19s.pdf?folderId=db3a30431400ef68011425b1354605c1&fileId=db3a30431400ef6801142683f6870630

This is the schematic i'll be using ( asc file attached ):


One of the first things that I don't know how to choose: the maximum voltage swing and the bias current.
I will also refer to points marked on the schematic - VB, VC, VE

For the IF transformer i will use T50-2 cores:http://toroids.info/T50-2.php Al = 4.9nH / N^2
The IF frequency is 10.7MHz ( i already have some good filters available )
Load resistor is 50 ohms ( SBL1-X mixer )

Transistor parameters:
VCE max = 15V - over this and the magic smoke gets out
IC max = 120mA ^ the same
hFE = [ 70 - 140 ] with 100 being the typical value.
Total power dissipation = 1W, but no conditions specified.
I will keep only the raw results, not E24 series values ( for now )

on my board : VCC = 12V
looking at the minimum noise figure, i choose IC=20mA - so now i have my bias current.

Now i must decide on VE and the maximum allowed voltage swing: Vpk
The limits are:
 - VPK+(VC-VE) < VCEmax
 - VC-VPK > VE  - so the transistor is not completely off

In my design, at DC VC = VCC.
If i want Vpk = 5V  =>
    5 + ( 12 - VE ) < 15
    12 - 5 > VE

So VE must be ~ 7V. Then VC will swing from 17 to 7V -> Maximum VCE in the circuit will be 10V
The DC gain ( hFE ) is high enough so i can assume IC = IE
The transistor will have to dissipate (VC-VE) * IC = 0.1W - it might not need a heat-sink for a dead-bug setup

Having IE = 20mA and VE = 7V => RE1 + RE2 = 350 ohms.

VB = VE + 0.65 = 7.65V ( the voltage the base would like to see )
IB = IC / hFE = 200e-6A ( base current )

I'll choose the base divider current at least 10x IB - let's say 5mA. I'll note the divider current as ID
For VCC=12V -> RB1 + RB2 = 2400 ohm

Id*RB2 = VB -> RB2 = 1530 ohms
RB1 = 2400 - 1530 = 870 ohms

Now, having all DC parameters set, i can determine small signal parameters.
gm = IC/25e-3 = 0.8
rpi = hFE / gm = 128 ohms

For AC : a "dynamic" resistance that will allow the specified voltage swing will have an equivalent resistance of :
Rd = Vpk / IC = 5 / 20e-3 = 250 ohms.
TR1 will have to transform 50 ohms to 250 ohms
Np/Ns = sqrt( Zp / Zs ) => Np / Ns ~= 2.24

I will choose for the primary winding 40 turns - on T50-2 it will have L=7840nH and will resonate with ~27pF
XL = 527.1 ohms at 10.7MHz.

With Np = 40 => Ns will be 17.85 . I'll choose Ns = 18 turs -> Zp will be ~247 ohms. Also, Nx will be 0 turns

For determining the tuned amplifier bandwidth i must first determine Q
The unloaded Q, Qu will be high for that inductor, assume 160, from http://www.micrometals.com/downloads/Q%20Curve%20Catalog%20Issue%20H.pdf

The unloaded equivalent resistor Ru = Qu * XL = 84336 ( formula 1.27 for the mit.edu )

The loaded equivalent resistor is Rl = Zp = 247

The actual resistor is R = Ru || Rl = 246.28 ohms.
Q = R / XL = 0.46 => this behaves as wide band amplifier.

To increase Q, R must be as high as possible.

If i take Ns = 1 turn -> Zp = 80000 = Rl
R = Ru || Rl ~= 41055 ohms
now Q will be 77.88 => BW = F / Q = 10.7e6 / 77.88 = 137.4kHz - more appropriate

The primary impedance must be brought down close to the initial 250 ohms.
Np and Nx will behave as an auto-transformer:
http://electronicdesign.com/communications/back-basics-impedance-matching-part-1 , figure 10

To transform 41055 ohms to 250, Np / Nx = 12.81.
Np = 40 turns -> Nx = 3.12.
If i choose Nx = 3 turns, Zx = 231 ohms - i will use this value
If i choose Nx = 4 turns, Zx = 410.5 ohms

=> the primary winding will have 37 + 3 turns, the secondary one will have 1 turn.

If I want a gain of 10 ( 20dB ), Rc / RE1 = 10 -> RE1 = 23.1 ohms, RE2 = 326.9 ohms.

My questions are:
1. are there any major mistakes in my calculations ?
2. is it ok to have just 1 turn in the secondary ?
3. is it ok to user a trimmer instead of RE1 and RE2 ? something like a 200 ohm trimmer with the wiper to ground, with 150 ohm resistor in series to GND
one of these: [url]http://ro.farnell.com/bourns/3364w-1-201e/trimmer-pot-200-ohm-25-1turn-smd/dp/2329297[/[url] - i can mount it dead bug style ~ easy.


 

Offline T3sl4co1l

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Re: Designing a narrow band IF amplifier ( WARNING - HUGER POST )
« Reply #1 on: February 29, 2016, 01:57:12 pm »
Hmm, lemme see here.

Principles:

1. What gain, bandwidth and center frequency are you looking for?
2. What input and output impedance?  Any reactances or reflections to worry about?
3. Since this is for IF, is AGC needed?  How will you address it?

I think I see #1 is "yes", "narrow" and 10.7MHz.

#2 seems like 50 ohms, but I think you're missing some important related information.

4. Never use more bandwidth than you need!  To do otherwise at least invites EMC and noise troubles; at worst, it simply won't work at all.

The BFQ19S is a 5 gigahertz transistor. It's also a [small] power transistor.  Knowing that you intend to work at 10.7MHz, this is so far below fT that it's nothing but DC to this transistor.  Which means gain is limited by hFE, which means, you will literally get the same or more gain from an MMBTH10 (fT ~ 1GHz, hFE > 60) or the like, without the potentially unmanageable GHz+ parasitic oscillations!

Bandwidth, in fundamental terms for amplifying devices, is kind of a hard-to-define thing:

BJTs tend to roll off pretty hard around fT.  The definition of fT is in terms of currents, so it doesn't preclude real, usable power gain above fT -- though you're unlikely to get much in most situations, like a few dB at best.  Most BJTs are designed so that other cutoff frequencies (such as recombination) fall in the same range, cutting off power gain as well.  So for most BJTs, fT is a pretty reasonable limit to work from.  Generally, you can assume hFE is constant from DC to a break frequency, then falling at -20dB/decade until reaching 1 at fT.  Consequently, hFE has a phase shift, which is pretty much 90\$^\circ\$ between 'break' and fT.

FETs don't have much of a physical limit (the transit time across the channel is supposed to be something like fractional ns), but terminal resistances, and the triad of capacitances (G-D, G-S and D-S), work to limit bandwidth in a similar way, though often not as suddenly (there's no straightforward "fT" for a FET).

For example: a 2N7002 biased at 4V, 100mA, might have 20dB gain at 100MHz, 10dB at 200MHz, and a few dB at still higher frequencies.  If the reduction is due to gate spreading resistance, then one would expect more of a diffusion characteristic (-10dB/dec) than a dominant pole (-20dB/dec) dropoff.  (A dominant pole suggests a simple gain-bandwidth trade-off -- like the BJT's hFE(freq) trade-off.)

Both BJTs and FETs tend to be good for pulsed and wideband circuits, because their capacitances are comparable to their internal (resistance and physics) limitations.  I think I'd say BJTs are a little better (a consequence of their higher current density, giving more gain, less capacitance, and lower load resistances), but MOSFETs can be designed quite nicely as well (Si MOS is available into the low GHz; RF Si BJTs are all but forgotten).

And if you're curious about vacuum tubes, they are limited by the transit time from cathode to grid to plate.  The movement of the electron beam itself, is the motion of matter: extremely little matter, but at high enough frequencies, it has a large impact.  By changing the grid voltage, you are literally performing work on the electron beam.  At low frequencies, you "get back" the energy, i.e., the beam exhibits capacitance.  At high frequencies, the energy simply propagates away and gets dissipated in the plate as heat (part of the reason why tubes must be derated at high frequencies).  This gives a physics-limted cutoff frequency in the fractional GHz for most UHF tubes, up to a dozen or so GHz for the most advanced planar triodes.

Because the current density is so poor, tubes are quite awful at pulsed/wideband applications (even Tektronix strained to achieve >85MHz bandwidth in their early 1960s scopes).  While capacitances are comparable to other devices (some pF), the voltages are high and the load current and gain are low, so load impedances are high (rarely under a few kohms).  Thus, tube circuits are almost always "narrowband", with such examples as Tektronix's distributed amplifiers being some of the exceptions.


So those are the basic devices.  With BJTs or FETs, you may still need to use a narrowband design, because of other necessities like power efficiency (or simply because you need a bandpass characteristic, which is the case here).  But you definitely don't want a screaming fast part, that's just inviting trouble.  A pedestrian 2N3904 would even serve well here, maybe in cascode, or using two stages in cascade, to kick the gain up a little more (since, with fT ~ 300MHz and hFE > 200, it will be in the hFE-dropping-off region).

As for your design process, I see:
- IC is pretty arbitrary.  Do you actually need 20mA worth of gain, or power?  Do you need the noise figure?  Is the noise figure even optimal with respect to IC, or the frequency you'll be operating at?  (The datasheet says it's measured at 900MHz and 1.8GHz.  Curves with respect to Vce, IC are not provided.)  Are you matched into the optimal impedance?  (Note they didn't happen to say what Zs(opt) was!)
- Your VE is pretty arbitrary; it's correct as a maximum (but then, your Vc(pk) is arbitrary too, perhaps just as an example..?), but it's undesirable as an operating condition.  More typical is VE = 1-2 x Vbe, enough to stabilize DC bias (on the order of, say, 10-20%) against thermal and manufacturing error, without impacting the Vc(sat) figure too badly.  Higher Vce is also desirable in reducing Ccb (though Ccb vs. Vce is not documented in the datasheet, so it's unclear how much difference this might make).
- Your base divider is correct, otherwise.
- gm is wrong, because RE1 is undefined at this point, actually!  The value is about right, if RE1 = 0 and CE1 is sufficiently large.  But you may wish to add emitter degeneration here, to prevent oscillation perhaps (at the expense of reduced gain, but with such a hot transistor, that would probably be a good idea).
- You also noted Rpi here, but didn't do anything with it. :) Presumably that needs to be matched with RS, perhaps using a tapped coil, or a narrowband matching network (series C, parallel L?).  Beware that Zin tends to be lower than Rpi (or even negative!) due to parasitic effects; though with fT so large, it should look pretty much like DC...
- You defined Rd for a power match, then took a side track with an arbitrary winding for L2...

This is where you should've entered bandwidth.  (Review the specs I led in with.. :) )

If you go with Rd = 250 ohms (not too arbitrary, a fine starting point if nothing else), then you need L and C such that the bandwidth is satisfied.  The Q factor is Fc/BW, or (picking an arbitrary 200kHz BW as you didn't provide a spec), 53.5.  For a series resonant network, that's Zo = 13375 ohms; parallel, 4.67 ohms.  The corresponding L and C will be impractical in either case...

So you should probably choose a tapped resonator (as pictured!).  The LC impedance Zo might be 10-2000 ohms (a not-unreasonable range for easy-to-find L's and C's).  Picking 1000 ohms, parallel resonant, as an example, you'd get 53.5kohms at the top (for the required Q).  You need to pick a tap some sqrt(250/53500) of the way down, or a turns ratio of 14.6:1.  The total L needed is 14.87uH (tapped at 70nH, but mind the coupling coefficient as well), and C = 14.8pF (which is a reasonable value for a variable capacitor).

You might decide on a lower Zo, resulting in a more favorable tapping ratio, and more capacitance (up to 500pF would be reasonable; you're pushing the limits on available trimmer caps with any more).

Note that the transistor's capacitance has basically no effect on the resonant circuit, because it's on such a low tap.  Or equivalently: ~2pF is comparable to 250 ohms at ~320MHz, which is 1.5 orders of magnitude beyond your center frequency (= affects tuning), and almost 3 orders of magnitude beyond your bandwidth (= affects operation)!  (With a tube circuit, you'd at least have to take it into account, because the plate load resistance might be 10kohms, and the plate capacitance ~4pF, suggesting BW < 4MHz.  They had it hard, back then!)

You could also add a tap to this winding for the output (you've got the correct ratio for 50 ohms output), but that's an even tighter ratio than we've got already, so it might be very tricky indeed.

You might instead opt for a "coupled resonator" topology.

In this case, L3 resonates with a capacitor (series or parallel).  It has a Q (due to RL) of the same value (53.5), and a coupling factor (to L1 and L2) of about 1/Q (~0.02).  The turns ratio doesn't matter, as long as everything comes out right.  The filter becomes second order, which means it can be tuned for a sharp but sloppy response, or an optimally flat response (for different meanings of "flat": the usual Bessel / Butterworth / x dB Chebyshev prototypes apply!), or overcoupled (two peaks with a valley inbetween).

You'd probably want L3 to be series resonant with RL, in which case L3 = 39.8uH and C = 5.56pF (on the small side, but reasonable).  Mind that L3 needs to be made with small parasitic capacitance, otherwise you'll blow well past the C figure.  (A tapped resonator here would probably be good, again, too.)

This approach gives you better selectivity (sharper attenuation, far from Fc) without compromising bandwidth.

If the inductors are wound as regular solenoids, with height about equal to diameter, then when positioned axially, the end-to-end distance will be a bit more than the same distance, for this coupling factor.  (You might get lucky with building such a coupling with SMT inductors of various types, but really, that's the biggest downside to a coupled resonator design, it's practically not manufacturable, it takes a lot of tweaking and hand labor.)

Speaking of bandwidth:

Note that the IF strip probably needs a shitload of gain (~120dB including limiting, if you're doing broadcast FM as I'd guess).  No single transistor can provide that (nor would you want it to; it would oscillate under all conditions!).  You'll be cascading multiple stages to achieve that.  Each stage you cascade, the bandwidth gets narrower.  Consider if you have one stage of 200kHz BW: it has -3dB points at 10.6 and 10.8MHz.  The -3dB points of two cascaded stages come at the -1.5dB points of each stage.  And so on.  This gets more complicated if you include higher-order filters (you can over-couple the filter, to place its peaks over the shoulders of surrounding stages, making things wider and flatter), or staggered tuning (by tuning stages around Fc, you lose some gain, but can keep things flat without the complexity of higher order filters).

And then you have to concern yourself with coupling.  If you want to normalize your amp stages to 50 ohms input and output, I would suggest adding some attenuation or damping.  This allows the input and (proceeding stage) output to operate into a more nominal load, without their reactances interacting and screwing up your carefully tuned frequency responses.  It also helps to address feedback and reactance of the amplifier itself (perhaps avoiding neutralization).  Obviously, this comes at the expense of gain, as usual.

It also helps to keep the center frequency, and frequency response, consistent.  If you apply AGC to the IF strip, you'll have to deal with all the transistor junction capacitances changing.  If nothing else, Rpi rises when bias is reduced, raising the Q factor.

If you aren't using AGC, then sooner or later, one or more stages will go into saturation, which means Vce(sat) is being pushed... which means varying capacitances again (and also a severe input loading, because Rpi drops to ~RE1 in saturation!).

And a final word about matching and reactance: did you really think an SBL1 is a perfect 50 ohms?  (It would be a pretty shitty mixer if it were, actually.)
https://www.minicircuits.com/pdfs/SBL-1+.pdf
Note the VSWR of the ports: RF isn't too bad (~1.2 over most of the range), but the LO is about 3, meaning more than half the incident power is reflected back -- it's more like 100 ohms (or maybe it's 25 ohms, or reactive -- who knows, the phase isn't defined).  Note also that these figures assume 50 ohm systems on all ports -- if your R/L port(s) aren't quite resistive at all frequencies (includes at LO and RF and sum and difference frequencies, and probably harmonics too!), expect things to be even worse.  It's often good practice to put attenuator pads around mixers, to help out with this.  The attenuators burn dynamic range, but at this point, you've got all that you can handle (if your IF strip is an FM limiter, then you don't care!), and you typically want to avoid mixers at the front end (which seems to be the case here), so it's not affecting your noise floor, either.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
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Offline orolo

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #2 on: February 29, 2016, 07:50:47 pm »
Well, the biasing looks correct: the calculations are right, and the simulation agrees. Using a fast transistor has the advantage of reducing the parasitic capacitance on the tank; simulating the circuit with a 2n2222, I had to use a 20p cap instead of 28p to get resonance at 10.7MHz. Simulating with a faster transistor, 2sc3357, the normal capacitance of 28p is right. Anyway, I'd use a trimmer cap to tune the tank.

Now, about the problem of loading the tank, what about using another transformer (this time a ferrite one, since there is no DC bias) after the amp to transform the 50 ohm impedance to a more reasonable level? For example, a 30:3 transformer in a FT50-67, to turn the 50 Ohms into 5K. Then transformer T1 turns these 5k into 25K. This amounts to a 19K load in the tank, with a Q above 20. That should give a bandwidth of about 40KHz. Also, if the transistor input impedance is about 250 Ohm, a 9:4 transformer at the input should give a rather good mathcing to 50 Ohms. All this is a quick and dirty, wideband job.

I did an implementation with this in mind: a 4T/9T transformer in FT37-43 at the input, and a 30T/3T transformer in FT50-67 at the output. I chose the emitter resistances as 100 and 250 more or less at random. The result is in the attachment, for a 1dbm input at 50 Ohm impedance: the power gain is about 18.5 db at resonance, if I'm not mistaken.

I'm just an amateur, so there are sure better ways to do this.
 

Offline danadak

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #3 on: February 29, 2016, 10:29:14 pm »
With so much Ft good chance you have an osc due to stray C and L. Especially in dead
bug styled design. Normally a device like this is used on transmission style PCB layout
with very well behaved S parameter design into 50 ohms.

There are ways of killing osc, like inserting 20 - 50 ohms series right into base, but that
still leaves you with layout uncertainties. Unless of course you establish S parameter
measurements that show a lot of phase margin.

Regards, Dana.
Love Cypress PSOC, ATTiny, Bit Slice, OpAmps, Oscilloscopes, and Analog Gurus like Pease, Miller, Widlar, Dobkin, obsessed with being an engineer
 

Offline vk6zgo

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #4 on: March 01, 2016, 01:51:55 am »
It may be fun to "re-invent the wheel",but it may help a lot if you have a look at existing designs of real IF strips.

"Narrowband" to an Amateur Radio Operator suggests bandwidths of less than 2-3kHz.
You are unlikely to achieve this using a 10.7MHz IF with LC tuned circuits.
Such limitations are the reason why multiple conversion Superheterodynes were popular for many years.

You may achieve "narrowband" response at high IFs,using resonators,crystal filters,& the like.

If the IF is intended for Broadcast FM,the problem changes to needing a fairly wide response,w.r.t the centre frequency.
 

Offline ealexTopic starter

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #5 on: March 01, 2016, 09:12:31 am »
hello

thanks for your responses.

T3sl4co1l - i will have to read your post several times to understand half of it
orolo - that's a nice idea to keep the tuned tank impedance high - never thought of it
vk6zgo - i don't want to reinvent the wheel, mainly to understand why and how

my main goal is to understand why things are designed as they are - and as a "target" i chose to make a complicated receiver ( dual conversion ) - i don't have any performance goals for it, just get it somehow working and then see what can be done to improve it and where i was wrong.

the values chosen in my first post where used for a starting point. that is one of my main problems: where to start with a design. for example - if the output impedance is high and you want low noise then try to  bias it like this, if you have low output impedance then you need to bias it like that, etc - some general rules to use as a starting point.

i looked at a lot of designs ( i have the 2015 arrl and it's quite useful ).
the problem is that i don't understand why some design choices are made. i can find tons of IF-strip designs but most of them explain almost nothing about why things where chosen as they where.
also, i have some local radio amateur books ( old , mainly tube based ) and they suffer the same problem.

I plan to use a crystal 10.7MHz filters - i have several of them with ~ 2KHz bandwidth. ( tested them )
I will have at least 3 IF stages - 1 before the filter and the others after it.
I've understood why mixers should be properly used - proper termination, etc - played a little with a signal generator and with low frequencies and patience event the old DS1052 and some cheap SDR receivers can be useful (softrock for example).

building style - mostly dead-bug - i usually use small "koptan" tape pieces to isolate smd's  from the ground plane, as it will not melt at soldering temperature, then work with wires as short as possible. also, pre-made pads for bigger components, etc.
 

Offline ealexTopic starter

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #6 on: March 01, 2016, 01:09:31 pm »
as a design exercise - to see it i understood what T3sl4co1l about choosing the Bw and the coil.

Input data:
Core: T50-2 ( as i have a bunch available )
F=10.7MHz
Bw = 100kHz
Rd = 500 ohms - is it ok higher or lower ? the available VCE swing should have a part in choosing Rd
Zo = 50 ohms
parallel resonant tank => Q = R / XL
where R is the "load" the primary sees with the secondary connected to a 50 ohms load.

Bw = F / Q -> Q = F / Bw -> Q = 107

For an untapped coil:
Q = R / XL where R = 500 ohms ( what i want the transistor to see )
107 = 500 / XL -> XL = 4.67 ohms at 10.7MHz -> just 4 turns on a T50-2 core.
That would require a 2.82e+3 pF capacitor -> huge

So, now i know Q and i have to choose some decent R and XL.
To restrict the range a little more - i have some variable capacitors that cover 10 to 35pF -> i'll choose L so it resonates at ~ 20pF -> L = 11100nH

* On my core that means 48 turns for L = 11290nH -> XL = 759 ohms.
Now R = Q x XL = 81203 ohms.

This means that, for the 48 primary turns, the 50 ohm secondary will have Np / sqrt(R / Rout )  = 1.19 turns.
* The 50 ohms output will have 1 turn

The last step is to calculate where to tap the primary coil to get ~500 ohms from the 81203 ohms impedance.
* The tap will have 4 turns.

So, now the used values are: Np = 48 turns, Ns = 1 turn, Nx = 4 turns.
The real values will be:
R = 115200
Q = R / XL = 151.77
Bw = 70.5kHz

I'm quite sure that because circuit parasitics it will not reach those values.
I'll have some time tonight to build it and see how it works, if it works at all

Another question - can I use a variable resistor instead of RE1 ? ( so i can control gain ) I have some small ceramic trimmers 7x7mm that i can use as smd's - cut the pins flush. Will it work or act as an inductor ?
I will also add 50ohms in series with the base - to reduce the chance of oscillation.


 

Offline T3sl4co1l

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #7 on: March 01, 2016, 01:32:58 pm »
Yes, that's the process. :)

On a low mu toroid, you can probably expect coupling factors from maybe 0.3 for a single turn, to 0.9 for more turns distributed over the remaining winding.  The basic effect is, you get less coupling between tank and load, so you need roughly 1/k times more turns on that tap.  So 2 or 3 turns would probably do for the 50 ohm output tap, and maybe 8 turns for the collector tap.  You'd have to build and measure to be sure (well, or simulate the part and determine its coupling factors, and design with that; but, yeah).

Note that you can make the inductor smaller by padding it with fixed capacitance.  The trimmer only needs to span the variable range necessary to account for drift or manufacturing differences.  So with that in mind, you might go for 1/4th the inductance and 60pF + 10-35pF adjustable, and the taps get more reasonable, though still not really very well coupled.

For the design of coupled resonators, I'd suggest reading some classics, like RDH4 (Radiotron Designer's Handbook, 4th ed.).  It's old (for tubes, of course), but it has all the basic calculations and graphs/tables necessary to design and build basic designs (including coil winding), and explains much of why, without going into theoretical depth.  (Whenever you see a pentode, just mentally replace it with a cascode pair of NPNs; given that the input will have a lower resistance, so adjust that as necessary.)  That's probably better than trying to hand-wave explanations here.  Again, with variable couplings, you can get matching without having to use a direct transformer ratio, which can be nice.

Tim
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Offline ealexTopic starter

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #8 on: March 01, 2016, 08:27:13 pm »
I had time today to build a test amplifier.
I've followed your advice and increased the capacitor to 68pF in parallel with the trimmer
The transformer ended up with 19+5 turn on the primary side and 3 turns on the secondary.

I've changed the circuit a little:
RE is just a 100 ohms trimmer with the wiper connected to GND via a capacitor, one end to the emitter and the other to ground.
there is a 200ohm resistor in series with VCC -> VC is ~7V. The base is biased from 820 + 560(to gnd) ohms
RB1 || RB2 = 332.8 ohms

As you said, those high FT transistors love to oscillate. With just an coaxial cable on the input, open-ended it would oscillate at 150-200MHz outputting almost 500mV in the 50ohm resistor - almost 7dBm.

I picked a BC547BZL1G - the first thing that was laying around and it behaved nicely.
I set the unbypassed portion of RE to ~ 27 ohms for a 20dB gain.

Generator output 10mV into 50 ohms, checked with only the scope and 50 ohm terminator.
Trace 1 - from input to channel 1, 50 ohm terminated on scope input. Measured voltage ~8.4mV -> amplifier input impedance of ~ 130ohm
Trace 2 - from output to channel 2, 10x, spring ground, 50ohm terminated on board.

Stable with: BC547BZL1G
after 10.7MHz input impedance drops
F     Vout   Av(dB)
10.4    70.3   18.45
10.5    78.5   19.41
10.6     83.5   19.94
10.7     83.4   19.93
10.8     78.2   19.37
10.9     70.2   18.44
11.0     62.0   17.36

RE1 is 27 ohms for a 10x voltage gain => the transistor sees around 270 ohms collector impedance -> 3 turns are too much for a 50 ohms load.

For a second test, i left the secondary winding to just 1 turn.
For RE1 = 20 ohm the collector voltage was 53.8mV for 1mV input ->~1070 ohms but the output is too low to measure.

Can you recommended a cheap transistor that i can pick up from farnell and be useful up to 100MHz ? i would avoid SMD - they work dead-bug but are a pain. I can't solder on a SOT-23-3 without a microscope but i've seen some small break-out boards for SOT23-3

2N3904 looks ok, but i've seen BC547 used in simple FM bugs.

messy construction:


scope capture - 2x average turned on
« Last Edit: March 01, 2016, 08:28:52 pm by ealex »
 

Offline T3sl4co1l

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #9 on: March 01, 2016, 11:25:11 pm »
You'll be choosing BCxxx if you're in the UK, or I suppose most of western Europe; 2N3904 is basically the same thing in the American (JEDEC) designation.  (And 2SC945 is not far off, if you like Japanese transistors.)

Like I said, something a little peppier like MPSH10 (MMBTH10 is SMT) would be fine; fT ca. 1GHz means you'll still get reasonable gain at 100MHz (presumably, hfe about 10), though it'll be in the "high frequency" range so you'll have to take suitable precautions (like neutralization, grounded base, or isolation with a cascode or diff pair).  Even 2N3904 is usable at 100MHz, but gain is less (3ish?).

You might also consider JFETs, which do a fine job at this stuff.  Examples are 2N5486 (THT may not be available anymore, SOT-23 is MMBTxxxx), PN4393, BF862, etc.  (Avoid ancient parts like 2N3819 with a 2-20mA Idss range -- you don't need such uncertainty.)  RF MOSFETs are also available.  You'd usually use a JFET in grounded-gate operation for a front end preamp (lower noise floor?), or as a mixer (dual gate MOSFETs, which also act like a cascode-in-one, were especially popular as mixers, but they're almost all gone nowadays).  I don't think JFETs are used much for later stages (IF, 2nd+ mixer, etc.), probably because there's no particular advantage (you're not down in the noise floor anymore) and they cost somewhat more.

Tim
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Offline ealexTopic starter

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #10 on: March 02, 2016, 11:01:23 am »
I have a  bunch of dual gate fets - got a simple test amp with one of them, they also work nicely as variable attenuators ( BF991 for example  )

i also want to stock on some jfets. BF256B http://www.farnell.com/datasheets/1868845.pdf

things are getting a bit clearer now.
i still have a question - how to choose the bias current.
right now, in my head:
 - if i want low noise, keep Ic low
 - if i want broadband, low ouput impedance keep Ic high so gm is high
 - if i want low input impedance keep Ic high so rpi is low
 - use the Beta versus Ic graph, if present, to pick the Ic with highest Beta

i will keep the high frequency parts i have for input pre-amps - just in front of the first mixer. one that has only resistive load seems very stable - no oscillations, etc. but will have low gain and needs serious bias current to provide gain into 50ohms (Av = gmRc)

KST10 seems similar to MMBTH10  http://www.farnell.com/datasheets/2006620.pdf
KSP10BU is the THT equivalent http://www.farnell.com/datasheets/1863499.pdf

i'll also get one of those resistor kits off ebay - it's nice to have all parts at hand, and i can reuse most of those trough-hole parts.

i mostly look at farnell as they are my best option for parts. local market is almost 0.
 

Offline T3sl4co1l

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #11 on: March 02, 2016, 11:57:11 am »
I have a  bunch of dual gate fets - got a simple test amp with one of them, they also work nicely as variable attenuators ( BF991 for example  )

i also want to stock on some jfets. BF256B http://www.farnell.com/datasheets/1868845.pdf

Ah, nice.

Quote
things are getting a bit clearer now.
i still have a question - how to choose the bias current.
right now, in my head:
 - if i want low noise, keep Ic low

Not arbitrarily so. Keep source matched, and dimension the load for the most gain or power that's practical.

Noise rises at low currents, ultimately due to not having enough electrons to do the job.  The impedance also rises, which may be impractical to match to, and will reduce bandwidth as well.  (It can still be helpful, say for low power applications, needing to run a whole radio on a mA or less.  At low currents, fT is about proportional to Ic, so you can comfortably use fast transistors at low currents, without too much worry of oscillation.)

Noise falls at higher currents (more electrons to work with, as it were; lower r_e, higher gm) so you generally see very low noise circuits seriously sucking down the bias.  But not too much, again: excess noise (a property of a resistor under bias), effects due to high-level injection (including fT falling again), and so on, make BJTs unsuitable at high currents, too.  The usual approach is to use very large devices (according to AoE3, ZTX851 (a 5A device!) is quite low noise indeed, albeit at low impedances), or many in parallel.  Statistics takes the noise down as 1/sqrt(N) for N devices.

Quote
- if i want broadband, low ouput impedance keep Ic high so gm is high
 - if i want low input impedance keep Ic high so rpi is low
 - use the Beta versus Ic graph, if present, to pick the Ic with highest Beta

Yep!

Although on beta, you probably want ~1/4 of that point, because fT falls before hFE falls, as you go into high-level injection.  And the lowest noise figure is usually at still lower currents.

Note, by the way, the converse of these: you can control gain with bias, for example, which means AGC is easy to implement by tying all your IF amps' base divider resistors to a common AGC rail, and varying that.  As long as the base (AC) voltages are small (~10mV), the linearity will be good; or if you want limiting, then the final stages can simply run into clipping (but an alternate design might be better there, like a current mode diffamp, to get by with less reactance-versus-AC-amplitude dependence).

Quote
i will keep the high frequency parts i have for input pre-amps - just in front of the first mixer. one that has only resistive load seems very stable - no oscillations, etc. but will have low gain and needs serious bias current to provide gain into 50ohms (Av = gmRc)

Yeah, you only need a little gain, to get the signal level above the noise floor of the next stage.  A common gate JFET, or common emitter BJT (possibly with neutralization), usually works well for that.

Quote
KST10 seems similar to MMBTH10  http://www.farnell.com/datasheets/2006620.pdf
KSP10BU is the THT equivalent http://www.farnell.com/datasheets/1863499.pdf

Yep, those are the Fairchild designations.

Tim
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Offline John Heath

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #12 on: March 03, 2016, 12:35:06 pm »
Hello

I'm working on a superheterodyne receiver from scratch and i'm struggling with the narrow band IF amplifier.
The first iteration behaved poorly - it would either have almost no gain or would just start oscillating at 100-200MHz.
It had ~ 4V of voltage between VCC and VE and ~ 3.5mA bias current. On 50 ohm the gain was at most 1 before starting to oscillate.

I'm trying to follow the design steps from here: http://my.integritynet.com.au/purdic/rf-amplifier-with-feedback.htm
The quality factors formulas are form
http://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-071j-introduction-to-electronics-signals-and-measurement-spring-2006/lecture-notes/resonance_qfactr.pdf

On the new IF amplifiers i would like to use BFQ19S transistors ( have a bunch of them ): http://www.infineon.com/dgdl/bfq19s.pdf?folderId=db3a30431400ef68011425b1354605c1&fileId=db3a30431400ef6801142683f6870630

This is the schematic i'll be using ( asc file attached ):


One of the first things that I don't know how to choose: the maximum voltage swing and the bias current.
I will also refer to points marked on the schematic - VB, VC, VE

For the IF transformer i will use T50-2 cores:http://toroids.info/T50-2.php Al = 4.9nH / N^2
The IF frequency is 10.7MHz ( i already have some good filters available )
Load resistor is 50 ohms ( SBL1-X mixer )

Transistor parameters:
VCE max = 15V - over this and the magic smoke gets out
IC max = 120mA ^ the same
hFE = [ 70 - 140 ] with 100 being the typical value.
Total power dissipation = 1W, but no conditions specified.
I will keep only the raw results, not E24 series values ( for now )

on my board : VCC = 12V
looking at the minimum noise figure, i choose IC=20mA - so now i have my bias current.

Now i must decide on VE and the maximum allowed voltage swing: Vpk
The limits are:
 - VPK+(VC-VE) < VCEmax
 - VC-VPK > VE  - so the transistor is not completely off

In my design, at DC VC = VCC.
If i want Vpk = 5V  =>
    5 + ( 12 - VE ) < 15
    12 - 5 > VE

So VE must be ~ 7V. Then VC will swing from 17 to 7V -> Maximum VCE in the circuit will be 10V
The DC gain ( hFE ) is high enough so i can assume IC = IE
The transistor will have to dissipate (VC-VE) * IC = 0.1W - it might not need a heat-sink for a dead-bug setup

Having IE = 20mA and VE = 7V => RE1 + RE2 = 350 ohms.

VB = VE + 0.65 = 7.65V ( the voltage the base would like to see )
IB = IC / hFE = 200e-6A ( base current )

I'll choose the base divider current at least 10x IB - let's say 5mA. I'll note the divider current as ID
For VCC=12V -> RB1 + RB2 = 2400 ohm

Id*RB2 = VB -> RB2 = 1530 ohms
RB1 = 2400 - 1530 = 870 ohms

Now, having all DC parameters set, i can determine small signal parameters.
gm = IC/25e-3 = 0.8
rpi = hFE / gm = 128 ohms

For AC : a "dynamic" resistance that will allow the specified voltage swing will have an equivalent resistance of :
Rd = Vpk / IC = 5 / 20e-3 = 250 ohms.
TR1 will have to transform 50 ohms to 250 ohms
Np/Ns = sqrt( Zp / Zs ) => Np / Ns ~= 2.24

I will choose for the primary winding 40 turns - on T50-2 it will have L=7840nH and will resonate with ~27pF
XL = 527.1 ohms at 10.7MHz.

With Np = 40 => Ns will be 17.85 . I'll choose Ns = 18 turs -> Zp will be ~247 ohms. Also, Nx will be 0 turns

For determining the tuned amplifier bandwidth i must first determine Q
The unloaded Q, Qu will be high for that inductor, assume 160, from http://www.micrometals.com/downloads/Q%20Curve%20Catalog%20Issue%20H.pdf

The unloaded equivalent resistor Ru = Qu * XL = 84336 ( formula 1.27 for the mit.edu )

The loaded equivalent resistor is Rl = Zp = 247

The actual resistor is R = Ru || Rl = 246.28 ohms.
Q = R / XL = 0.46 => this behaves as wide band amplifier.

To increase Q, R must be as high as possible.

If i take Ns = 1 turn -> Zp = 80000 = Rl
R = Ru || Rl ~= 41055 ohms
now Q will be 77.88 => BW = F / Q = 10.7e6 / 77.88 = 137.4kHz - more appropriate

The primary impedance must be brought down close to the initial 250 ohms.
Np and Nx will behave as an auto-transformer:
http://electronicdesign.com/communications/back-basics-impedance-matching-part-1 , figure 10

To transform 41055 ohms to 250, Np / Nx = 12.81.
Np = 40 turns -> Nx = 3.12.
If i choose Nx = 3 turns, Zx = 231 ohms - i will use this value
If i choose Nx = 4 turns, Zx = 410.5 ohms

=> the primary winding will have 37 + 3 turns, the secondary one will have 1 turn.

If I want a gain of 10 ( 20dB ), Rc / RE1 = 10 -> RE1 = 23.1 ohms, RE2 = 326.9 ohms.

My questions are:
1. are there any major mistakes in my calculations ?
2. is it ok to have just 1 turn in the secondary ?
3. is it ok to user a trimmer instead of RE1 and RE2 ? something like a 200 ohm trimmer with the wiper to ground, with 150 ohm resistor in series to GND
one of these: [url]http://ro.farnell.com/bourns/3364w-1-201e/trimmer-pot-200-ohm-25-1turn-smd/dp/2329297[/[url] - i can mount it dead bug style ~ easy.

Nice to see there still is an interest in the analog world. Well done on the prototype as well. This brings to mind an old idea that has been sitting on the back burner for 30 years or so. This has to do with a bridge between the analog world and the power of software for the best of both . Build a RF , OCS , IF and detector with the cheapest parts around. Build a second one. Include in this design varicap diode control to trim RF , OSC and  IF. I suspect you already know where this is going. With a PIC processor tweak radio A through varicap control for best signal to noise at say 1 MHz. Activate radio A . We now focus Mr PIC's attention on radio B to tweak through varicap control for best signal to noise at 1 MHz. Then activate radio B and realign radio A and so on. This way the radio is continuously being realigned for peak performance without the need for expensive parts or adjustments as Mr PIC processor does this throughout the life of the radio as it ages and temperature changes. RF Q could also be improved without the worry of OSC / RF tracking as it is continuously being realigned for peak performance with smart software. What do you think ??
 

Offline ealexTopic starter

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #13 on: March 03, 2016, 01:51:32 pm »
John Heath - i don't think i can follow your idea, but it seems to make sense - have 1 receiver working and the other one under calibration, then switch. it might work if the parameters do not vary too fast ( my first oscillator worked more like an FM modulator ). It's a topic too advanced for me, i'm still struggling with the basics.
 

Offline AF6LJ

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #14 on: March 03, 2016, 03:25:51 pm »
This is one of the best threads in a while now.
I always enjoy reading your posts Tim, between refreshing what I was taught back in the day, and learning from what you post.

Thanks Guys!
 :-+ :-+
Sue AF6LJ
 

Offline John Heath

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #15 on: March 04, 2016, 01:45:26 am »
John Heath - i don't think i can follow your idea, but it seems to make sense - have 1 receiver working and the other one under calibration, then switch. it might work if the parameters do not vary too fast ( my first oscillator worked more like an FM modulator ). It's a topic too advanced for me, i'm still struggling with the basics.

The bottom line is I like what you are doing. Not easy to design RF as it is not suited to standard bread board prototyping at 10.7 MHz. And your use of transistors makes it harder when there are ICs that would make it easier. This is noticed so I give you a thumbs for doing it the old school way without shortcuts. Somewhat like the watch repairman. A skill that will be lost in time with resonate crystals and such.   
 

Offline ealexTopic starter

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Re: Designing a narrow band IF amplifier ( WARNING - HUGE POST )
« Reply #16 on: March 04, 2016, 11:52:36 am »
so, after looking over https://martein.home.xs4all.nl/pa3ake/hmode/receiver_intro.html - Gain Distribution and some other similar discussion i've decided to implement it in the following way

a. amplifier - high bias, 20mA, purely resistive, unbypassed resistor to control gain
b. 3dB pad 50 ohm
c. mixer RF input ( SBL-1x )
d. diplexer, centered at 10.7MHz, terminated in 50 ohms on all ports, already built and adjusted
e. IF amplifier 1, 2k input, 200 ohm output to 10.7MHz filter - maybe i can use a low gain not tuned amp, as the first one
f. 3db 200 ohms pad
g. 10.7Mhz filter, 2kHz BW, 200 ohm and a 200ohm resistor as a terminator
h. 5x tuned if amplifier with 2k in, 2k out ( ~100dB gain )
i. another high current amplifier, not tuned, towards the second mixer
j. 3db 50 ohm pad
k. 2'nd mixer
l. diplexer, low-pass, terminated in 50 ohm resistors
m. op-amp filter and amplifier
n. output -> PC SDR software

For the IF amp.
Bias is 2mA, BC547B
Re = Re1 + Re2 = 1000 ohms -> Ve = 2V
where RE1 is the unbypassed resistor, Re2 is the bypassed one.
I can use a 1k SMD trimmer like http://ro.farnell.com/murata/pvz3g102c01r00/potentiometer-1kohm/dp/2219385

I've chosen Rc high - around 5K - i can change Av from 5 to 400 by adjusting Re.
Each stage will have a gain of ~20dB -> Re1 = Re2 = 500 ohms

The primary will have 25 turns on a T50-2 core, L=3063nH, Xl = 206 ohms
for a Bw of 100kHz at 10.7MHz Q will be 107.
R = Q * Xl = 53500 ohms
This means 5 turn on the secondary side and ~ 8 turns on the primary tap.

-> 17+8 / 5 turns.

It will require ~71pF to resonate at 10.7MHz -> 68pF or 56pF with a trimmer ( need to test )

BW response:


Circuit - values that i will use


asc file attached

i'll start building each stage once i have parts available. i really need to get one of those resistor kits off ebay.
 


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