Author Topic: Designing for Castellated Modules  (Read 641 times)

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Offline phil from seattle

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Designing for Castellated Modules
« on: April 18, 2021, 05:11:59 pm »
I posted a variant of this in the Microcontrollers section, got crickets.  Maybe I was asking the wrong question.  Or in the wrong group. So, take two...

I am looking for advice on designing a PCB that uses a surface mount castellated module (SMCM). It is a RasPi Pico if that matters.  I am hoping I can use a 2L board for this. There does not seem to be anything about this on the internet.  Or maybe I am not use the right search terms.

What are best practices here?

One thing I don't understand - are 2 layers of solder mask a sufficient insulator?  i.e., is it safe to have copper (plane or traces) underneath the SMCM on the top layer of the base PCB?  The bottom of the SMCM module has visible routed traces. Are 2 layers of solder mask sufficient to provide insulation between those traces and ones on the top layer of the base board?  I assume that the solder will hold the SMCM module in place and any mask voids will still have 2 solder mask thicknesses of separation between the two copper layers. Obviously, I will avoid routing where there is bare copper or metal.

Are there any issues with "untented" vias? The Pico looks to have fully tented vias.  Do I need to tent my vias as well? Looking at couple of boards that were designed to take SMCMs, it appears there was no concern about routing traces and untented vias. 

Are there any other things I should be aware of?
 

Online gnuarm

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Re: Designing for Castellated Modules
« Reply #1 on: April 18, 2021, 05:38:41 pm »
To me, this is a tough question.  I've not seen castellated devices on the market for professional use unless they were actually a LGA (land grid array).  Otherwise the closest things are QFN no lead packages which mostly show you the keep out zones under the chip because they typically are solder pads.  When they are not solder pads they are not large, so they indicate locations so you can avoid them with vias.

I can't tell you if the solder mask is sufficient insulation.  I would expect it to be since there will be no relative movement to speak of and there may even be separation.  The solder tends to float an IC above the board so you will see some daylight under a QFN.    I don't know if the module will do the same thing. 

There are also castellated resistor packs, but they are so much tinier that there may be no comparison. 

Does the module have any soldering instructions?  Will you be assembling by hand?  If so you can slide a piece of paper under most of the package allowing one or two pins to be solderable.  The paper can be removed and the remaining pins soldered making a space between the module and main board.  You can select as thick paper as a gap desired.  You need to allow enough gap so the boards won't touch if flexed.

How large is the module anyway?  Got a data sheet?
Rick C.
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Online ataradov

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Re: Designing for Castellated Modules
« Reply #2 on: April 18, 2021, 05:43:56 pm »
Routing under is fine. This is a very common practice for modules. Having exposed programming pins on the bottom is also common. Two layers of solder mask is plenty for isolation.

The only thing I would worry about is if you are using HASL finish on either of the boards, there is a very minor chance that it won't be level enough, and would actually stick far enough to reach the other board. But for this to happen, you would need to be very unlucky.

And if you only have untented vias exposed under the module, they are not big enough to catch enough solder, even if HASL used.

Alex
 

Online ataradov

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Re: Designing for Castellated Modules
« Reply #3 on: April 18, 2021, 05:45:28 pm »
To me, this is a tough question.  I've not seen castellated devices on the market for professional use unless they were actually a LGA (land grid array).

Here is one example of modules designed for professional use: https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/32-bit-mpus/sip-and-som/system-on-module
Alex
 

Offline phil from seattle

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Re: Designing for Castellated Modules
« Reply #4 on: April 18, 2021, 11:30:26 pm »
Quote
Does the module have any soldering instructions?  Will you be assembling by hand?  If so you can slide a piece of paper under most of the package allowing one or two pins to be solderable.  The paper can be removed and the remaining pins soldered making a space between the module and main board.  You can select as thick paper as a gap desired.  You need to allow enough gap so the boards won't touch if flexed.

How large is the module anyway?  Got a data sheet?

It is the RasPi Pico. I did not find any instructions for laying out a board. No reflow instructions either. Module is 51.2 x 21 mm

Datasheet is here https://datasheets.raspberrypi.org/pico/pico-datasheet.pdf

Quote
The only thing I would worry about is if you are using HASL finish on either of the boards, there is a very minor chance that it won't be level enough, and would actually stick far enough to reach the other board. But for this to happen, you would need to be very unlucky.
I often use HASL.  For this project/product, the Pico will be hand soldered in place - it won't be a problem. Though I'll keep that in mind for later.  I do have another project where I might have an ESP32 module reflowed.
« Last Edit: April 18, 2021, 11:37:14 pm by phil from seattle »
 

Online gnuarm

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Re: Designing for Castellated Modules
« Reply #5 on: April 18, 2021, 11:50:26 pm »
It is the RasPi Pico. I did not find any instructions for laying out a board. No reflow instructions either. Module is 51.2 x 21 mm

Datasheet is here https://datasheets.raspberrypi.org/pico/pico-datasheet.pdf

The data sheet does give a pad footprint for your board.  Page 8.  But it is one of the more obtuse drawings I've ever seen.  Rather than give the pad dimensions, LxW and the spacing, they give the total length of the row of pads outside dimension, the outer pads inside dimension and the total length of the row of pads minus one one each end.  WTF??? Why do they want to make you do these calculations rather than just providing the information that is so simple when given directly? 

What is totally absent is a temperature profile for the reflow.  I don't know how much assemblers use this stuff when setting up their ovens, but it gives me a warm fuzzy when it is provided.  Seems especially important for a module that already has parts on it.
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Offline phil from seattle

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Re: Designing for Castellated Modules
« Reply #6 on: April 19, 2021, 07:30:33 am »
Yes, I used the drawing to make a footprint.  It is typical of drawings like that.  They provide just enough info (usually) to be unambiguous but would it kill them to do the math for things like pad size or show measurements from a common reference?  I usually have a spreadsheet open when making a footprint though Kicad allows math in numeric fields which makes it easier.
 

Online Miti

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Re: Designing for Castellated Modules
« Reply #7 on: April 19, 2021, 10:55:17 am »
One thing I don't understand - are 2 layers of solder mask a sufficient insulator?  i.e., is it safe to have copper (plane or traces) underneath the SMCM on the top layer of the base PCB?  The bottom of the SMCM module has visible routed traces. Are 2 layers of solder mask sufficient to provide insulation between those traces and ones on the top layer of the base board?  I assume that the solder will hold the SMCM module in place and any mask voids will still have 2 solder mask thicknesses of separation between the two copper layers. Obviously, I will avoid routing where there is bare copper or metal.

If you’re worried about two layers of solder mask not being enough, you can cover the area under the module with silk screen.
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Online gnuarm

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Re: Designing for Castellated Modules
« Reply #8 on: April 19, 2021, 04:44:51 pm »
One thing I don't understand - are 2 layers of solder mask a sufficient insulator?  i.e., is it safe to have copper (plane or traces) underneath the SMCM on the top layer of the base PCB?  The bottom of the SMCM module has visible routed traces. Are 2 layers of solder mask sufficient to provide insulation between those traces and ones on the top layer of the base board?  I assume that the solder will hold the SMCM module in place and any mask voids will still have 2 solder mask thicknesses of separation between the two copper layers. Obviously, I will avoid routing where there is bare copper or metal.

If you’re worried about two layers of solder mask not being enough, you can cover the area under the module with silk screen.

If coupling between traces on the module and traces on the board being laid out is a concern, I think I'd leave it at the solder mask.  Pretty much everything has a higher dielectric constant than air and the spacing is going to be smaller than pretty much any layers on your board, perhaps 5 mil (0.127 mm).  With air in the gap you will see a lower capacitance. 

The insulation is only an issue if the boards touch.  I think that should be pretty hard to have happen unless the boards are being flexed which is inherently bad on its own.  That will pop parts off the boards or damage them.

Skip the HASL and use ENIG.  It doesn't really cost much more.  I think Oshpark even offers it.  Then there is no reason to worry about the vias.
Rick C.
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Offline SiliconWizard

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Re: Designing for Castellated Modules
« Reply #9 on: April 19, 2021, 05:30:55 pm »
Is this for hand soldering or automated reflow?
 

Online Miti

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Re: Designing for Castellated Modules
« Reply #10 on: April 19, 2021, 11:03:53 pm »
If coupling between traces on the module and traces on the board being laid out is a concern, I think I'd leave it at the solder mask.  Pretty much everything has a higher dielectric constant than air and the spacing is going to be smaller than pretty much any layers on your board, perhaps 5 mil (0.127 mm).  With air in the gap you will see a lower capacitance. 

The insulation is only an issue if the boards touch.  I think that should be pretty hard to have happen unless the boards are being flexed which is inherently bad on its own.  That will pop parts off the boards or damage them.

Skip the HASL and use ENIG.  It doesn't really cost much more.  I think Oshpark even offers it.  Then there is no reason to worry about the vias.

The boards do touch if he SMT them. And I don't understand where the air gap is.
I don't think cross talk between traces is his concern, and if you look at RaspPi Pico, there are not many traces underneath, he can pour a ground plane under that area. My understanding is that he's worried about electrical isolation.
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Online gnuarm

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Re: Designing for Castellated Modules
« Reply #11 on: April 19, 2021, 11:26:43 pm »
If coupling between traces on the module and traces on the board being laid out is a concern, I think I'd leave it at the solder mask.  Pretty much everything has a higher dielectric constant than air and the spacing is going to be smaller than pretty much any layers on your board, perhaps 5 mil (0.127 mm).  With air in the gap you will see a lower capacitance. 

The insulation is only an issue if the boards touch.  I think that should be pretty hard to have happen unless the boards are being flexed which is inherently bad on its own.  That will pop parts off the boards or damage them.

Skip the HASL and use ENIG.  It doesn't really cost much more.  I think Oshpark even offers it.  Then there is no reason to worry about the vias.

The boards do touch if he SMT them. And I don't understand where the air gap is.
I don't think cross talk between traces is his concern, and if you look at RaspPi Pico, there are not many traces underneath, he can pour a ground plane under that area. My understanding is that he's worried about electrical isolation.

Maybe we mean different things by "touch".  Of course they touch at the solder pads, but there will be a layer of solder between the boards.  The data sheet even talks about through hole pins not reaching through the board, but there may be a blob of solder on the bottom side, so they recommend a pad underneath so the solder is not too thick and holds the module too far off the board.  So you can count on a few mil of solder separating the two boards.  I think he is planning to hand solder, so he may want to solder wick these pads to remove any blobs, even small ones.  But he needs to be careful to not remove solder from within the through hole.

He may or may not be concerned with coupling between traces on the two boards, but that is not the same thing as saying there is or isn't a problem.  A ground plane is clearly not a good idea for either insolation or for signal coupling.  Best is to leave that layer a "keep out" zone, but I think he knows that, that's why he is worried about shorts, he plans to have traces and even vias under the module.

It might be best to do what I suggested, insert a spacer such as a corner of a piece of paper under the part to provide space until the corner pins are soldered.  The space can be controlled by the thickness of the paper or the number of sheets.  Remove them once the corners are tacked and then finish the rest of the pads.  That will give a significant spacing between the boards, enough to prevent touching even if the boards are flexed.
Rick C.
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Offline phil from seattle

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Re: Designing for Castellated Modules
« Reply #12 on: April 20, 2021, 01:19:10 am »
Yes, Rick is right.  The whole point of asking is so I can use the space under the Pico for routing. The board I am making is for a Pico port of grblHAL CNC controller software. Discussion about the board is here. I am hoping to make it a 2L board so we can have a very low cost, high quality CNC motion controller for <$30 end user cost including the Pico. I am trying to keep most of the traces on the top to have a solid ground plane. Not routing under the Pico makes that goal pretty difficult. Initially, the Pico will not be surface mounted.  Right now, I have 14 vias and 31 top level traces under the Pico in the socketed version. If the board proves popular, I may offer a version with the Pico surface mounted.
« Last Edit: April 20, 2021, 01:45:23 am by phil from seattle »
 


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