Different die pictures

[Noopy]

I have posted a ADG444 here: https://www.eevblog.com/forum/testgear/replacement-for-fluke-700013-ic-(quad-spst-analog-switch)/msg3602298/#msg3602298

 

[Noopy]

Doehler & Haass SDH105, a decoder asic for model railroads.




The die is 2,8mm x 2,3mm. You can spot the twelve logic lines.




Nice! 




Here we see eleven mask revisions.
R3 and D3 look like two metal layers with C3 as connection between them. Looks like the metal layer and the connection were modified once more than the rest. Seems reasonable.




The lower part of the die probably contains some housekeeping and signal processing.




Very small structures but that is clearly logic circuit.




That is probably the driver for the external H bridge.




Here we have three output stages. Two big transistors and one smaller transistor.




One output stage in detail. You can spot the driver circuit in the right part of the picture.


https://www.richis-lab.de/loco01.htm

 

[RoGeorge]

Seriously?!   

[Noopy]

Seriously?!   

If I ever design an ASIC I definitely would integrate a nice big picture! 

[mawyatt]

Nice logo

Here's a corner of an Indium Phosphide chip I designed awhile back, my favorite hobby 

Best,

[Noopy]

Here we have the next part of the GDR telephone system (https://www.richis-lab.de/phone.htm), the B387, the so called analog processor:




It´s quite a big die.
To be honest: I don´t 100% understand all the features of the B387. The good old analog telephone system is more complex than it seems in the first place. 




Some test structures.




Some spare parts.




The B387 is an analog circuit but there is a digital serial interface to configure the performance of the analog circuit. In the right lower corner of the die we can spot very different structures what is probably the digital part.


https://www.richis-lab.de/phone07.htm

 

[Noopy]

Waveform generator MAX038 (0,1Hz-20MHz)




The datasheet states there are 855 transistors. I didn´t count them. 
There are a lot of bondpads because important connections were done with two bondwires and there are a lot of independent GND bondpads.




Designed 1994...






They used the masks 20A, 22A, 30A, 38A, 60A, 90A, 97A, 100A, 110A, 120A
20A and 22A seem to form a buried layers.
The color of 30A is seen in some of the resistors.
It looks like 38A and 60A are just silicon oxide with different thickness. Perhaps 38A is the gate oxide while 60A gives contact from the metal layer to the transistors and resistors.
90A seems to be the first metal layer which would fit with 60A generating vias.
97A adds a red material which can be adjusted with a laser.
110A is the second metal layer.
100A makes contact from the second to the first metal layer.
120A probably forms the bonding areas.




We see such structures quite often whenever there is a laser tuning process.




Cut red wires to adjust the resistors. 






In the datasheet there is a die picture which show the signals of the bondpads.
There is one small mistake in the datasheet. COSC is connected to two testpads. 




In the upper left corner there are five bigger squares, probably the output driver.
I´m not sure what the purpose of the longer structure in the corner is. It seems it´s just connected to V+ and V-.
In the right area you can spot two bigger parts. That is the SYNC ouput driver. It is connected to it´s own supply at the upper edge of the die.




The construction of the capacitors is unusual.




The connection of the reference output shows that the voltage reference has to be located in the lower left corner of the die.
There are four testpads probably to adjust voltage and drift. If you track the wires you find four red fuses disconnecting the testpads after adjustment.
REF has its own ground connection. There are a lot of GND connections which are not connected internally.




This square structure is interesting. Perhaps that´s the sine shaper. Sine shaper often have repetitive structures.


https://www.richis-lab.de/gen01.htm

 

[magic]

I´m not sure what the purpose of the longer structure in the corner is. It seems it´s just connected to V+ and V-.

Probably some ESD thing. Slightly similar to the smaller ones near each I/O pin.

Is this complementary bipolar? I don't see obvious lateral PNPs and I don't think it's CMOS either.
The capacitors may be metal-metal caps because there are clearly two metal layers available.

(I gotta post some text to this thread because otherwise it's all just picture posts and each page takes forever to load).

[Noopy]

I´m not sure what the purpose of the longer structure in the corner is. It seems it´s just connected to V+ and V-.

Probably some ESD thing. Slightly similar to the smaller ones near each I/O pin.

But just connected to V+ and V-... Strange... 

Is this complementary bipolar? I don't see obvious lateral PNPs and I don't think it's CMOS either.

I´m not sure about that.

They used the masks 20A, 22A, 30A, 38A, 60A, 90A, 97A, 100A, 110A, 120A
20A and 22A seem to form a buried layers.
The color of 30A is seen in some of the resistors.
It looks like 38A and 60A are just silicon oxide with different thickness. Perhaps 38A is the gate oxide while 60A gives contact from the metal layer to the transistors and resistors.
90A seems to be the first metal layer which would fit with 60A generating vias.
97A adds a red material which can be adjusted with a laser.
110A is the second metal layer.
100A makes contact from the second to the first metal layer.
120A probably forms the bonding areas.

Looking at the masks my first guess would be CMOS but the transistors look more like bipolar.
The buried layers 20A and 22A would be perfect for bipolar.
Perhaps 38A is no gate oxide but a emitter doping.

The capacitors may be metal-metal caps because there are clearly two metal layers available.

I don´t think so. The smooth metal we see at the capacitors is the lower one.

(I gotta post some text to this thread because otherwise it's all just picture posts and each page takes forever to load).

Indeed that´s a problem in here.

[magic]

But just connected to V+ and V-... Strange... 

Clamping overvoltage due to current flowing from ESD diodes to the supplies and/or maybe providing a short circuit path if supplies are reversed. Lots of new TI datasheets have an overview of their internal ESD protection and they show a box between the rails labeled "ESD absorption circuit".

Similar thing here. Maybe half of the circuit is the actual opamp (schematic in the TL971 datasheet) and the rest is some big "thing" between the supply rails.

You are right about capacitors, there is a bunch of upper layer metal traces flying over them

[Noopy]

But just connected to V+ and V-... Strange... 

Clamping overvoltage due to current flowing from ESD diodes to the supplies and/or maybe providing a short circuit path if supplies are reversed. Lots of new TI datasheets have an overview of their internal ESD protection and they show a box between the rails labeled "ESD absorption circuit".

Similar thing here. Maybe half of the circuit is the actual opamp (schematic in the TL971 datasheet) and the rest is some big "thing" between the supply rails.

Sounds reasonable! 

[Noopy]

We had the SDH105:

https://www.richis-lab.de/loco01.htm

Here we have the second generation: SDH112




The die is 2,6mm x 2,1mm. Well only 2,2mm x 2,0mm are used. Perhaps more than one project was integrated on the wafer... 




And again a locomotive but a little smaller than in the SDH105.






The logic area... A little smaller...




Three output stages, 300mA lowside transistors.




With these bondpads the EMK feedback of the motor is measured to get a better motor control.




H-bridge control




The bigger structure on the left is a voltage regulator.
Perhaps the two bigger rectangular structures are DACs for the ADC of the motor EMK measurement.


https://richis-lab.de/loco02.htm

 

[Noopy]

Coolaudio V3205, a 4096 stage BBD (Bucked Brigade Device) that delays audio signals.
[spoiler] ...well, it´s a counterfeit part... [/spoiler]
While a CCD moves charges through a uniform layer a BBD uses discrete parts (transistors and capacitors).




The datasheet of the V3205 shows the working principle.
Two clocks switch alternately transistors in the line so the charge packages travel from one capacitor to the next.
Since the capacitors are connected to the gate of each transistor the capacitor goes high while the next transistor is switched on. That makes the charges to travel into the next capacitor very efficient.
Only half of the 4096 stages contain information because you have to transfer the charge from a capacitor before you can save the next charge.
Between two stages there is kind of a cascode transistor isolating the following transistor against voltage fluctuation.
At the end there are two outputs which generally are connected together to reduce sampling artefacts.
The last transistor disposes the charge into Vdd.






The die is 4,2mm x 3,8mm and most of it is occupied by the 4096 stages. The datasheet of the V3205 states a capacitance of 2,8nF for each clock intput.




Yes, it isn´t a Coolaudio V3205 but a Shanghai Belling BL3205.#
Revision 3?




The big structures in the corners of the die seem to be massive undervoltage protection diodes. They are placed at CP1, CP2 and Vgg and connected to GND.




Vgg and Input




Vdd is only used by the output circuit.




Output circuit




First capacitor is connected to GND.




The structures are surprising simple. Since the gate of the switching transistor and its capacitor both use the same clock and the signal jumps from left to right in one column the upper layer aside a clock supply line is just a big rectangle with slots. The cascode transistor is placed below the Vgg line.




And here we have the output circuit with naming.


https://www.richis-lab.de/bbd01.htm

 

[T3sl4co1l]

So, what good is that?  C switched into C causes the signal to decay geometrically.  There's no regeneration (gain) between stages.  Can't it only work as a CCD (the charge is "squeezed out" from under the proceeding stage, and so on)?

Tim

[Noopy]

So, what good is that?  C switched into C causes the signal to decay geometrically.  There's no regeneration (gain) between stages.  Can't it only work as a CCD (the charge is "squeezed out" from under the proceeding stage, and so on)?

The C is connected to the previsous transistor gate so as soon as the next transistor is conducting the capacitor is lifted to a high level and the charges are flowing down the hill into the next C.
A CCD works similar but doesn´t consist of discrete parts.

Edit: German-English correction. 

[magic]

It woks in some weird way. The datasheet is extremely unhelpful, but those of similar devices like Philips TDA1022 tell more about intended operating conditions. In particular, Philips instructs to load the outputs (which are not buffered with source followers in their design) with 100~400µA and to bias the input near Vdd/3 for class A operation.

If you imagine that both clocks are high then the device is simply a chain of closed switches and common gate FETs (ignoring the OUT buffers) and it pulls some bias current from VDD when the input is taken below Vgg-Vgs(th). The final Vdd series resistor not included on the schematic may limit the current and make it less dependent on Vgs(th) thermal drift.

With normal clocking, the capacitors are alternately bootstrapped high and low so that charge can always flow backwards between pairs n+1→n or n→n-1, depending on phase.

Presumably, you want to set the input to such level that there is a constant average DC flowing backwards which exceeds the small variations in charge transfer due to the signal.

I think the common gate FETs prevent charge equalization between capacitors and signal attenuation. It seems that if any charge has been removed from a given capacitor in the preceding half-cycle, the subsequent common gate FET acts as source follower and pull the capacitor back up to Vgg-Vgs(th) by drawing an equal charge from the next capacitor in line. The bootstrapping makes it possible.

[Noopy]

I think the common gate FETs prevent charge equalization between capacitors and signal attenuation. It seems that if any charge has been removed from a given capacitor in the preceding half-cycle, the subsequent common gate FET acts as source follower and pull the capacitor back up to Vgg-Vgs(th) by drawing an equal charge from the next capacitor in line. The bootstrapping makes it possible.

It´s called Tetrode Bucket Brigade.
The Bell System Technical Journal, February 1973, A Fundamental Comparison of Incomplete Charge Transfer in Charge Transfer Devices:

The tetrode bucket brigade, first proporsed by Sangster, is shwon in Fig. 12a. It was proposed in order to reduce the drain conductance or feedback contribution to incomplete transfer, the effect known to be the dominant performance-limiting effect for bucket brigade at low frequencies.

[RoGeorge]

The Bell System Technical Journal, February 1973, A Fundamental Comparison of Incomplete Charge Transfer in

https://worldradiohistory.com/Archive-Bell-System-Technical-Journal/70s/Bell-System-Technical-Journal-1973-2.pdf
found in https://worldradiohistory.com/Bell_System_Technical_Journal.htm

[magic]

Right, it would still work without those common gate FETs. The same refilling of one capacitor from the next one would be accomplished by the switching FET.

So what exactly is the point of this "tetrode" version? Keeping Vgs constant against decreasing voltage at the next stage? Not sure if I understand their jargon

[Noopy]

In my view the common gate FET forms kind of a cascode with the following FET so this one doesn´t see the decreasing voltage of the previous stage.
As you have written that keeps Vgs constant.

[TheUnnamedNewbie]

It looks like there is a thin coating on top of the BQ27220. Flip-chip parts often have problems with light fluctuations. Some time ago there was a flip-chip voltage regulator on a Raspberry Pi 2 that resets the processor whenever you take a picture of the board using a flashlight.  Perhaps this coating damps some of the light reaching the chip.

I think the coating is there because you can see that they use a external RDL process to add the balls. The feature sizes of the RDL don't seem to be in line with an integrated RDL+eutectic bump technology, so I suspect a polyamide RDL technology is used - the polyamide being the layer you see

[Noopy]

It looks like there is a thin coating on top of the BQ27220. Flip-chip parts often have problems with light fluctuations. Some time ago there was a flip-chip voltage regulator on a Raspberry Pi 2 that resets the processor whenever you take a picture of the board using a flashlight.  Perhaps this coating damps some of the light reaching the chip.

I think the coating is there because you can see that they use a external RDL process to add the balls. The feature sizes of the RDL don't seem to be in line with an integrated RDL+eutectic bump technology, so I suspect a polyamide RDL technology is used - the polyamide being the layer you see

I talked about the coating on the upper side of the BQ27220. That could be protection against "light problems". On the bottom of the part there is probably polyimide or polyamide or something like that. 

[TheUnnamedNewbie]

Ah, in that case I probably misunderstood!

[T3sl4co1l]

Ah yes, the resetting each capacitor to something Vgs(th) below Vgg or Vcp+/- would do it.

The cascode then further reduces that charge dependency on Vds, i.e. balancing against the following stage.

Tim

[mawyatt]

Wonder how good the charge transfer between capacitors was in the scheme? The CCDs we designed ~50 years ago had CTE better than 0.99999 per transfer and had over 10,000 stages, so the end result was (0.99999)^10,000 for a >90% overall Input to Output Transfer Gain.

Best,