Author Topic: Different die pictures  (Read 81611 times)

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Offline NoopyTopic starter

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Re: Different die pictures
« Reply #250 on: November 24, 2022, 04:47:56 am »
Someone has sent me a datasheet for the CCO 200!  :)

The CCO 200 is supplied with 5V and should put out HCMOS with Uhigh>4V so the TL431 has to put out a little more than 3,6V.  :-//
Nevertheless the voltage is too low to supply the TL062 properly.
« Last Edit: November 24, 2022, 04:54:37 am by Noopy »
 

Offline magic

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Re: Different die pictures
« Reply #251 on: November 24, 2022, 08:43:46 am »
To be fair, old TI datasheets didn't have that "recommended operating conditions" section.
http://www.elenota.pl/datasheet-pdf/49444/Texas-Instruments/TL062

The chip must have worked good enough for this TCXO at 4V, but I suspect that input range is quite limited - 1V or so below the top rail. Particularly, the inputs may not work accurately (or at all) near ground on symmetric ±2V supplies.

There is something dodgy about TI's ±5V ratings on jellybean chips. NE5532 is another one which didn't have "recommended operating conditions" in old datasheets and later got ±5V, even though the front page used to advertise "wide supply range - ±3V to ±20V". The 2001 revision of the datasheet has both ±3V on the front page and ±5V later, and recommended maximum ±15V and then some specifications at ±18V ::) I see that they resolved these inconsistencies in modern revisions by deleting the "wide supply range" claim and removing 18V specs.
 
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Offline iMo

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Re: Different die pictures
« Reply #252 on: November 24, 2022, 08:53:19 am »
The regulation range of that TL062 in that TCXO is perhaps several mV, thus it could be the smallish Vcc was "just enough" and they were lucky..
PS: while looking at the soldering quality I would say the manufacturer was something like "a garage one man show startup"  :D
« Last Edit: November 24, 2022, 08:57:40 am by imo »
 

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #253 on: November 24, 2022, 12:43:59 pm »
To be fair, old TI datasheets didn't have that "recommended operating conditions" section.
http://www.elenota.pl/datasheet-pdf/49444/Texas-Instruments/TL062

[...]

There is something dodgy about TI's ±5V ratings on jellybean chips. NE5532 is another one which didn't have "recommended operating conditions" in old datasheets and later got ±5V, even though the front page used to advertise "wide supply range - ±3V to ±20V". The 2001 revision of the datasheet has both ±3V on the front page and ±5V later, and recommended maximum ±15V and then some specifications at ±18V ::) I see that they resolved these inconsistencies in modern revisions by deleting the "wide supply range" claim and removing 18V specs.

Very interesting!  :-+


The regulation range of that TL062 in that TCXO is perhaps several mV, thus it could be the smallish Vcc was "just enough" and they were lucky..
PS: while looking at the soldering quality I would say the manufacturer was something like "a garage one man show startup"  :D

The small regulation range helps here definitely.
The quality is really strange, not to say shocking. In the end that´s a high precision clock generator.  :o

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #254 on: December 16, 2022, 04:05:39 am »


The KCO-010Y is a crystal oscillator built by the Japanese company KOYO. I found no datasheet, but the inscription shows that the clock frequency is 16MHz. The numbers 87-49 could be a datecode.






In contrast to the RASCO (https://www.richis-lab.de/osc_01.htm) and MCO1610A (https://www.richis-lab.de/osc_02.htm), the oscillator/driver is located as a die on the ceramic substrate. Besides that, just a backup capacitor for the supply voltage was necessary.

The quartz resonator itself is round. Especially a flattening in the upper area catches the eye.

1051R is most likely a designation for the layout on the ceramic carrier. The Vcc line at the upper edge approaches the contacting of the quartz resonator at one point. Apparently, an additional resistor or capacitor could be populated here.




A transparent, silicone-like potting protects the die. The chips that were produced while opening the case adhere well to this potting.

You can already see that two bondpads on the right edge of the die have not been contacted. The Vcc area where the die is located has been extended to the right...




The potting cannot be completely removed from the 1,2mm x 1,1mm die. The design dates back to 1985 and there are auxiliary structures in all four corners that allow the manufacturing quality to be monitored. Also, the designations and revisions of six masks can be seen.

The quartz resonator is attached to the left edge. Several large capacitors are also integrated there.

In the upper right corner is the output of the oscillator. At the upper edge the corresponding push-pull output stage is integrated. To the left of the two large transistors are the somewhat smaller driver transistors. Wide lines lead from the Vcc potential (top left) and from the GND potential (bottom center) to this output stage.

The function of the bondpads on the right edge cannot be clarified with absolute certainty. Often oscillators provide additional outputs with different levels, but no additional output stage can be seen. Since the ceramic carrier offers a large Vcc bonding area in this area, it could be that the free bondpads represent a configuration interface. Perhaps connecting the pads to the Vcc potential results in doubling or halving the clock frequency.




The string LSI4801 in the lower left corner could be an internal designation. The characters M-R 05 01 02 cannot be assigned.


https://www.richis-lab.de/osc_04.htm

 :-/O
 
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Offline NoopyTopic starter

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Re: Different die pictures
« Reply #255 on: December 26, 2022, 04:56:12 am »
For those who haven´t "clicked the bell" on the other topic, I have posted a DG444, another analog switch here:

https://www.eevblog.com/forum/testgear/replacement-for-fluke-700013-ic-(quad-spst-analog-switch)/msg4602076/#msg4602076

https://www.richis-lab.de/aswitch08.htm

 :-/O

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #256 on: January 02, 2023, 05:17:27 am »


Besides the widely used microprocessor Z80 Zilog also produced the microcontroller Z8. In the GDR, the U88xx series had been developed, which functioned like the Z8. The U88xx was still based on an n-channel silicon gate process. From this, the U840 was developed in the Funkwerk Erfurt, which was based on a CMOS process and thus had a significantly reduced power consumption. The document above comes from the Thuringian Museum of Electrical Engineering (https://www.elektromuseum.de/) and shows the basic specifications of the U840.








The U840 was presented at the Semiconductor Components Symposium of the Frankfurt Oder Semiconductor Plant in 1989. Among other things, the above block diagram can be found in the associated documents.




The container shown here also comes from the collection of the Thuringian Museum of Electrical Engineering. This container can be used to transport up to 25 wafers. The black knob allows the lid to be pressed onto the housing sealing it.

On a piece of tape are the numbers 3937, which is most likely the number of the batch. The numbers 1-25 are probably the numbers of the 25 wafers that were originally in this container.




Eight wafers remained in the container.




Most of the circuits on the wafers are marked as rejects with a coloured dot. In addition to the actual circuits, there are 10 test areas on the wafer. With an edge length of 7,5mm x 7,4mm, the U840 is extremely large for a 3" wafer. Just 56 complete circuits can be displayed on it. The U809 (5,5mm x 3,4mm https://www.richis-lab.de/wafer05.htm), on the other hand, can be put 181 times on a 3" wafer. All this is no comparison to the D220 (edge length 1,2mm https://www.richis-lab.de/wafer01.htm). Even on a 2" wafer, it can be imaged 1128 times.




The number 3937 is carved on the back of the wafer, which is most likely the batch number as described. The 6 probably stands for the sixth wafer of the batch.

The rainbow colours, which repeat irregularly in a circle towards the centre, are interesting. Apparently, the thickness of the passivation layer changes here. Depending on the thickness, there are different resonances for the incident light and thus constructive or destructive interference occur. This is how the different colours are created. The colour sequences indicate a steadily decreasing or increasing thickness of the layer.




The edges of the wafer appear to have been bevelled. They appear somewhat irregular.




Two different large test structures are integrated on the die, which in turn consist of several blocks. The picture above shows one of the test structures.






One of the test blocks is called CM11 and contains some smaller function blocks.






A second block bears the designation CM10, below which the date 18 JAN 87 and the letters KH are found. Compared to CM11, somewhat more complex test structures are integrated here.






Simpler structures are shown in this block. On the left and bottom edges are transistors with different length/width ratios. The test structures on the upper edge apparently allow different vias to be measured. On the right edge, different resistors seem to have been integrated. In the middle there are three capacitor surfaces.






In this block, in addition to two large transistor areas, there are several geometries of the different dopants, but also small diodes and transistors.






Among the blocks of the test structure are also two HTC04, two sixfold inverters.






The letters SC are missing on the second sixfold inverter. It seems that the structures could be reduced in size in the SC variant.




The second test structure contains significantly larger elements, but also structures that were already present in the first test structure.






Many of the larger elements appear to be test structures for various vias.






The same different transistors as already seen in the pictures above are found in this test area. In the middle, however, two very large transistor areas are integrated.






In this block, different capacitor areas can be measured. The strip at the top left could be a ring oscillator with which the quality of the transistors can be evaluated.






The block seen here is very similar to a block in the first test structure.






In these two very large structures, long lines of the metal layer run over many lower strips. No vias are visible. Perhaps the influence of the metal layer on deeper layers can be determined here. Within the structures there are some signs in old German script.






In the block shown here, various different test structures are integrated once again.






The U840PC is 7,5mm x 7,4mm. This image is also available in a higher resolution (https://www.richis-lab.de/images/wafer/05x41.png 193MB). Some geometries can be assigned to their function, such as the two large regular structures in the upper right area.




The Thuringian Museum of Electrical Engineering has a photo of the structures of the U840. Superficially, there is no difference to the structures on the wafer. However, it must be a different revision, as the copyright sign is shown differently.




The reference to the copyright of the MME (VEB Mikroelektronik "Karl Marx") can be found under the designation U840.




Here you can see the U840 in the PLCC housing. The datecode XD stands for a production in December 1989.


https://www.richis-lab.de/wafer06.htm

 :-/O

"Sorry", a lot of pictures.  ;)
With my equipment it´s hard to take good pictures of complete wafers that is why some pictures are not as good as we would like to have them.
« Last Edit: January 02, 2023, 11:50:08 am by Noopy »
 
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Offline RoGeorge

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Re: Different die pictures
« Reply #257 on: January 02, 2023, 08:43:55 am »



Most of the circuits on the wafers are marked as rejects with a coloured dot.

Why the few incomplete dies near the wafer edge are of both types, some with the marking dot and some without the dot?
Why bother testing and marking them, and how come they are not all marked as bad?

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #258 on: January 02, 2023, 11:53:04 am »
That's a good question. I assume they had some areas where they were sure that the parts are scrap and so didn't even test and ink them. But I'm not sure about that...  :-//

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #259 on: January 24, 2023, 10:31:04 am »
I have created a new sub category on my website:
Analog Multipliers
https://www.richis-lab.de/amult.htm
More coming soon...






The Burr-Brown MPY100 is a analog multiplier that can be used up to 500kHz. However, above 1kHz the non-linearity increases strongly. The A grade offers the worst specifications. M stands for the TO-100 package. Alternatively, the MPY100 is available in the DIL14 package. Texas Instruments still produces this analog multiplier today, but it is no longer recommended for new designs.




The block diagram in the datasheet shows the typical structure of an analog multiplier. The voltages at the inputs X and Y are converted into currents, multiplied and fed to an output amplifier, whose reference potential is the voltage at input Z. With this setup, complex calculations can be performed in analog.




The datasheet includes a picture of the metal layer of the die, which measures 2,72mm x 2,36mm.




The real die looks very similar to the picture in the datasheet.




In circuits that are aligned with a laser, Burr-Brown always integrates squares marked with letters at the edges of the die, which are partially marked with the laser during the alignment. What exactly is documented with this squares remains unclear.




As usual with integrated circuits that undergo an alignment with a laser, a testpad with a square structure is also found here. In the MPY100, a second testpad was even integrated to measure a wide resistor structure. The somewhat unclean cross that was burned into the test structure with the laser is noticeable too.




In the case of the resistor elements, it is easy to see that the laser is set a little outside the resistor areas and then moves in the direction of the resistor. You can also see that the alignment was not a continuous process, but was done point by point.

On the bottom edge there is a typical Burr-Brown designation: CIC01382. There are ten masks shown, some of which have been revised once.






As with the ICL8013 (https://www.richis-lab.de/ICL8013.htm), the circuit has a consequent symmetry so that disturbances such as thermal gradients are compensated as far as possible. The core is the multiplier circuit (blue), which was doubled and surrounds the diodes in the X-differential amplifier (pink). The diodes are NPN transistors whose base-emitter path is used as diodes. Two current sinks, not drawn in the block diagram, provide some minimum quiescent current through the diodes in parallel with the current flow through the X amplifier.

The X, Y and Z differential amplifiers (green, red, yellow) are somewhat more complex than shown in the block diagram. There are protection diodes between the base and emitter of the transistors and small capacitors are integrated between the two branches of the differential amplifiers. In addition, there is not one but two current sources in the emitter path, which are connected with a cross resistor ("pi-degeneration").

The output amplifier (cyan) is placed at the right edge of the die in such a way that its heat dissipation affects X and Y amplifiers very similarly.

The MPY100 contains a bandgap reference, which can be seen by the typical transistor arrangement (white). This reference voltage is used to control the various current sinks.


https://www.richis-lab.de/amult01.htm

 :-/O
 
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Offline NoopyTopic starter

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Re: Different die pictures
« Reply #260 on: January 28, 2023, 04:03:52 am »


Here we had a U809 wafer. The chief engineer of the U809 now has provided me some background information.




Now I know what the mask F does. After generating the active areas with the mask A, the mask F generates vias to the active areas. Through this vias the polysilicon can contact the active area. Since that was an improvement of the process the mask got the next free letter F.

Without the "F contact" you have to jump from the polysilicon to the metal layer and from there back to the active areas. You need more area and you disturb the routing in the metal layer.




Here you can see "F contacts" (yellow).
(If not you have an old picture in your cache. >:D)




The scrapped dies (with the dot) were used to adjust the bonding tools and the packaging machines.






In series production the pins of the package were optimized. The outer pins were made a little wider to make them stronger.




In the first shot of the U809 there was an error. There was one gate contact missing. Because of that they changed the mask C1 to C2. In series production every mask was updated. It´s uncertain why this was done.


https://www.richis-lab.de/wafer05.htm

 :-/O
 
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Offline NoopyTopic starter

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Re: Different die pictures
« Reply #261 on: January 29, 2023, 04:26:55 am »


A small update to the U840:

- It is definitely an independent development not a copy of a "model".

- Even though the U840 was described as a "customised special processor", in my opinion it is nevertheless a microcontroller that can be used quite universally. The intended use was in programmable logic controller in communications engineering.

- The U840 was first manufactured on 3", later on 4" wafers. This makes sense, of course, with the large dies.

- The size of the dies is interesting: Two documents give an edge length of 6,5mm. But I measure 7,5mm and I'm pretty sure about that. You can attribute 0,1-0,2mm to measuring errors and the interpretation of the milling lines, but I'll never get to 6,5mm. Perhaps first the circuit was displayed on these 3" wafers in a larger size ratio and then later changed to the target structure size.  :-//


https://www.richis-lab.de/wafer06.htm

 :-/O
 
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Offline NoopyTopic starter

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Re: Different die pictures
« Reply #262 on: January 30, 2023, 07:57:58 pm »


A minor correction:
The reference circuit for the bias looks like a bandgap with these two transistors with the special area ratio and a current mirror... But a closer look reveals that this is not a (classical) bandgap reference. It´s "something else"...  :-//


https://www.richis-lab.de/amult01.htm

 :-/O

Offline magic

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Re: Different die pictures
« Reply #263 on: January 30, 2023, 08:33:11 pm »
Looks like the LM285-style bandgap reference with 6:1 raito differential pair. Similar thing was used in LT3750.

Right to left:
NPN emitter follower which drives the bandgap voltage.
Reference diode in series with the feedback divider.
Current mirror biasing the diff pair.
Ratioed diff pair connected to taps in the feedback divider.
PNP mirror load.

Above:
Feedback resistors.
Dual PNP emitter folower which bootstrapts the mirror and drives a chain of NPN/PNP followers on the left edge of the die and then the rightmost NPN in the reference cell.
 
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Offline NoopyTopic starter

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Re: Different die pictures
« Reply #264 on: January 31, 2023, 07:58:46 am »
That´s an interesting hint, thanks!  :-+
Have to think about that...

Offline mister_rf

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Re: Different die pictures
« Reply #265 on: February 01, 2023, 10:26:55 pm »
I have  various  die pics who I think can be posted  here also.  :)
Pictures has been taken at 1x – 5x, without any microscope, using only camera lenses.
First, some unusual sensor.

FUGA 18 IBIDEM Retina: a foveated vision sensor CMOS chip designed by the IMEC (Interuniversitair Micro-Electronica Centrum VZW.) and IBIDEM consortium. This was a project funded by the European Union under the Technology Initiative for Disabled and Eldely (TIDE). (1995)
This has been used as a vision sensor in “Machine learning” and “Robot perception”. The main features of the sensor are:
Technology: CMOS
Total Number of pixels: 8013
Pixel arrangement (periphery): 128x56
Pixel arrangement (fovea): 20 rings with variable pixel's number
Minimum Pixel Size: 14 microns
Size of the chip: 8.3mm
Logarithmic response to illumination






« Last Edit: February 02, 2023, 08:13:53 am by mister_rf »
 
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Offline TurboTom

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Re: Different die pictures
« Reply #266 on: February 01, 2023, 10:54:15 pm »
Now that's a peculiar one! Thanks for sharing.
 

Offline quadtech

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Re: Different die pictures
« Reply #267 on: February 12, 2023, 01:11:06 pm »
Some cool die pics are there in Marco Reps video on his build of an ADR1000 based voltage ref

 

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #268 on: February 12, 2023, 09:53:25 pm »
Some cool die pics are there in Marco Reps video on his build of an ADR1000 based voltage ref



I think I know who took these pictures...  ;D

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #269 on: February 22, 2023, 02:50:25 pm »


The board shown here with the designation KA630 is a CPU module of the MicroVAX II. The MicroVAX computer systems were developed by DEC (Digital Equipment Corporation) and are successors of the VAX-11 model series. The MicroVAX I was the first generation, followed by the MicroVAX II.

The "Digital Technical Journal" published by DEC in March 1986 explains many details of the MicroVAX II. According to this, the focus of the development was to integrate as many CPU functions as possible, which were previously distributed over many integrated circuits, into one microprocessor. This development was necessary to remain competitive.

The first mask set of the 78032 was developed in 20 months, according to Digital Technical Journal. It took 6 months to establish the requirements and basic design. The development of the actual circuit required 14 months. The goal was to mass produce the IC after two and a half years at the latest.




The Digital Technical Journal contains the above illustration of the KA630 board. The core of the board is the 78032 CPU and the 78132 FPU, with two gate arrays above them. The lower gate array is tightly coupled to the CPU. The upper gate array is the interface to the Q22 bus, which connects the CPU board to the other modules. A full integration of the VAX architecture would have required 1,25 million transistors. However, the technology at the time only allowed one tenth of this to be integrated into the microprocessor. Therefore, compromises had to be made in the degree of integration.

On the left, 36 256kBit DRAM devices are populated, providing a total of 1MB of RAM. The Digital Technical Journal reports a shortage of 256kBit devices at the time of development, so an alternative assembly with 64kBit memory was planned. You can expand the working memory up to 16MB with expansion cards.




The "KA630-AA CPU Module User's Guide" contains a block diagram that shows the architecture of the CPU board in more detail.




The 78032 CPU and 78132 FPU are placed in a TQFP-68 package with a round heat sink.




The 78032 was just used by DEC itself. Therefore it is not surprising that no datasheet exists. The above block diagram from the Digital Technical Journal is the most detailed representation that can be found.




The integrated function blocks are presented in great detail in the Digital Technical Journal.




The heatsink is glued onto the ceramic package. The CPU operates with 5V and a clock frequency of 20MHz. This typically results in 3W of power dissipation.




The inscription can be found on the underside of the case. The numbers 8536 in the lower right corner probably represent the datecode. The string 333M refers to the internal designation DC333.




The die is fixed in the upper half of the case. This allows the heat to be efficiently dissipated through the top of the package.




In the overview, it is noticeable that special attention was paid to an interference-free supply of the individual function blocks. The outer areas of he upper half of the die contains the wide data and address interface. These drivers have their own wide supply lines, which are routed to four pins in each of the two corners with two bondwires. The supply pins in the middle of the left and right side supply the actual CPU via two bondwires each. The interfaces in the lower half partly have their own bondwires again, but they are not as exclusively supplied as the upper interfaces.

A small cuboid in the lower right corner puts the potential of the carrier and thus also of the substrate to a pin, which in turn is connected to a bondpad.




The die measures 9,1mm x 9,0mm. The Digital Technical Journal gives a size of 8,7mm x 8,6mm, which is the size without the remainings of the frame structure. The Digital Technical Journal further describes that 125.000 transistors were integrated. A 3µm NMOS process with two metal layers was used, which DEC called ZMOS.

The picture shown here is also available in higher resolution (102MB): https://www.richis-lab.de/images/cpu/04x10XL.jpg




The Digital Technical Journal shows the distribution of the function blocks on the die. Obvious is the very large ROM in the lower area that converts the commands into the necessary control signals. The core of the CPU, here called I-Box, E-Box and M-Box, is very large due to the 32Bit wide structures and including the control circuits takes up more than half of the area.




On the upper edge there is a copyright from 1984 and the internal designation DC333. The letters in the left area are certainly abbreviations of the developers. The Digital Technical Journal reports 18 developers who worked on the 78032.




Eight masks are directly visible. As far as the letters indicate revisions, the design was revised nine times. In contrast, the Digital Technical Journal praises "very very few bugs", in detail it would have been "less than 20 bugs" until it was possible to boot the operating system.

The two metal layers 8 and 10 are nicely visible here. The mask 7 creates contacts to the silicon. The upper metal layer can only contact the lower metal layer, for which mask 9 is used. Mask 11 then creates openings in the passivation layer where the bondpads are located.

In addition to the masks of the metal layers, just three visible masks remain. It can be assumed that other masks were used between 1 and 5. The Digital Technical Journal describes four transistor types that were available in this process: N, E (light enhancement), L (light depletion) and D.




In the frame structure the designation and the revisions of the mask set are mapped one more time. 2U CDS could be a process designation.

A label is just visible in the upper left corner, apparently referring to the technology node. The lines start with ZMOS.ULTRAL and end with a date from 1983.




A test structure at the bottom edge contains several elements. The long stripes on the left seem to be resistors. The remaining structures represent different transistors.






A very wide test structure is integrated at the right edge. It remains unclear which function is shown here, but it seems there are a lot of identical elements connected in series. Perhaps several gates were connected in series to check their quality with a test signal.




In the lower right corner (rotated here) is a bias generator, like the ones found in the µPD7220 (https://www.richis-lab.de/GraKa02.htm#bias) and the D82720 (https://www.richis-lab.de/GraKa03.htm#bias). It is a charge pump that generates a negative potential. Directly visible is the relatively large capacitor, which is contacted with many vertical leads. The negative potential is transferred via the cuboid next to the die to the carrier and thus to the substrate. The negative body potential improves the switching behavior of the transistors.




In the lower left corner of the die the clock processing is located, which takes up a relatively large area (rotated here). A 40MHz clock must be supplied from the outside. The Digital Technical Journal explains that eight phase-shifted clocks are generated from this clock. The drivers have to be partly very powerful, because they have to drive up to 250pF.




The layout of the large ROM is given by the Digital Technical Journal as 1600 x 39Bit.




As already described, the reduction of transistor and area consumption was a critical requirement. The optimized arrangement of the control commands in the control ROM brought relief. The Digital Technical Journal additionally highlights the X-shaped memory cells with their reduced area consumption.




I can´t resolve the relatively complex structures of the memory.


https://www.richis-lab.de/cpu04.htm

 :-/O
 
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Offline NoopyTopic starter

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Re: Different die pictures
« Reply #270 on: February 24, 2023, 08:30:34 pm »


The DEC 78132 is an FPU that resides on the MicroVAX II CPU board. Like the 78032 CPU, the 78132 FPU is housed in a TQFP-68 ceramic package with a bonded heat sink. Like the CPU, the FPU operates at 5V and 20MHz. The power dissipation remains below 2W.




In the Digital Technical Journal, DEC shows the function blocks integrated into the 78132.




The inscription can be found on the bottom of the package. The numbers 8538 in the lower right corner probably represent the datecode. The string 337C refers to the internal designation DC337.




While opening the case, some pins broke out. But you can still see that not all pins were used.




The solder with which the die is attached in the case was applied very generously. At the upper edge it is partially on the top of the die.




The die is 8,5mm x 6,8mm in size. The Digital Technical Journal states a size of 8,4mm x 6,6mm. The same 3µm NMOS process was used as for the 78032.

The image shown here is also available in higher resolution (132MB): https://www.richis-lab.de/images/cpu/05x05XL.jpg




The Digital Technical Journal shows the distribution of the functions on the die.




On the top edge of the die there is a copyright from 1984. In Hudson Massachusetts DEC operated a fab.




In the middle of the die is another copyright notice.




The DC337 designation is also shown inside the die, as well as the note that it is an FPU.






The mask revisions and the process-typical structures show that the 78132 and the 78032 were manufactured with the same process.

The internal designation DC337 is also shown here. The upper metal layer shows a revision C, so it was revised twice. On the package, the designation 337C can be found. Apparently, the letter at the end stands for the revision of the design. The package of the 78032 is labeled 333M. There, a revision L is visible. However, it may well be that a mask that is not directly visible was revised once more.




At the upper edge there are various teststructures. The left corner shows a whole row of transistors with different gate electrodes.




Another transistor has one large contact on the bottom side and very many adjacent contacts on the upper side.






Three large blocks contain long, folded rows of different vias that allow to meassure the quality of these contacts. Most likely, the vias on the left are from the upper to the lower metal layer. In the middle there are vias from the lower metal layer to the polysilicon layer and on the right there are vias from the polysilicon to the active layer.




There is also a somewhat more complex test circuit on the upper edge. A somewhat larger power stage is shown on the right. You can also the the testpads that supply the circuit.




In the upper right corner there are six testpads with large output transistors. The testpads were obviously contacted during production. The six lines leading to the testpads appear to be connected to six control lines in the "Exponent Datapath" area.




Like the 78032, the 78132 has a bias generator, but it can be seen a little better here.




The clock conditioning takes up a large area in the upper left corner. There are several large driver transistors connected to the rest of the circuit via eight wide lines.




The microsequencer converts commands into control signals. The Digital Technical Journal states that a command is 35 bits wide. In total there are 200 commands, which are accommodated in a large matrix. The matrix is divided into two parts, it consists of an AND and an OR matrix.

30 of the potentials, which the OR matrix outputs, lead to the function blocks. These are not yet directly control signals, they activate local decoder matrices. This reduces the number of control lines. Five potentials of the OR matrix are fed back to the AND matrix and influence the selection of the next address.




The division into two parts is clearly visible. The lower area contains the OR matrix, the output of the 35 control signals is on the left. The 200 lines are controlled by the upper AND matrix, which contains 26 lines. The associated 13 address lines can be seen on the far left.


https://www.richis-lab.de/cpu05.htm

 :-/O
 
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Offline IanB

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Re: Different die pictures
« Reply #271 on: February 25, 2023, 06:41:08 am »
The board shown here with the designation KA630 is a CPU module of the MicroVAX II. The MicroVAX computer systems were developed by DEC (Digital Equipment Corporation) and are successors of the VAX-11 model series. The MicroVAX I was the first generation, followed by the MicroVAX II.

I was an active user of the MicroVAX II. We used them as workstations for real-time simulation software. At the time the price/performance ratio was very competitive for an industrial strength application. Also the OpenVMS operating system had features and capabilities that you would recognize today in Windows (and some features like real-time task scheduling that you might not).

It is funny seeing a system I spent so much time using as industrial archeology today.
 
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Offline iMo

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Re: Different die pictures
« Reply #272 on: February 25, 2023, 07:06:13 am »
DEC - my first IT company I worked at, the best one.. :-+
 

Offline NoopyTopic starter

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Re: Different die pictures
« Reply #273 on: February 25, 2023, 09:48:34 am »
It is funny seeing a system I spent so much time using as industrial archeology today.

Time is running... ...somtimes very fast...  ^-^

Offline Gyro

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Re: Different die pictures
« Reply #274 on: February 25, 2023, 10:47:37 am »
Another ex-DEC employee here. I remember graduating from VT100 to VT220, MicroVAX workstation (monochrome) and ultimately MicroVAX II workstation. It felt like we'd reached the peak of technology. We still used Runoff for document preparation though - non of that wysiwyg rubbish!

We developed a T1 router with a MicroVAX II chip in too (DEMSA-AA and -AB Microserver).


P.S. We were probably the first to do home working, with home terminal and modem.

EDIT: I just found an old Microserver proto board in the garage (a bit dusty)!  ;D
« Last Edit: February 25, 2023, 11:09:26 am by Gyro »
Best Regards, Chris
 
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