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Differential active RF probe design queries
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Nitrousoxide:
Hello all,

I've decided that it would be a good learning exercise to layout an active probe. The desired operating range would approximately be between 100kHz and 1GHz. The layout is pretty much complete, however, I do have a few uncertainties and questions.

Top layer:


Bottom layer:


1. Controlling impedance:
I had used saturnPCB's calculator to find the ideal width for a trace to have a line impedance of 50 ohms per manufacturing specs (0.6mm pcb thickness, 6 mil gap) for a coplanar waveguide. This gave me a trace width of about 25mils.

As a sanity check, does this width seem reasonable? I know over super short lengths (relative to frequency) it doesn't become that much of an issue, Just wanted to make sure.
Most PCB manufacturers offer the option to control trace impedance, is this entirely necessary considering that I have attempted to do that in the design? Does this just refer to materials used? Or will they modify the design to attain a 50 ohm impedance?

2. Problem areas:
There are a few problem areas that I have issues with. Following the signal path (black line), the first region selected by white are two parallel capacitors. Now, would the asymmetry in path lengths cause an issue for high frequency? (This also occurs on the input too) Would I need to length match due to potential phase shift? (Im asking for "from experience" cases, rather than purely mathematical)

Secondly, the trace for the OPAMP feedback and output (as highlighted by the second white region). Is it ok to run the feedback trace under the device? I know the substrate is tied to (AC) ground, so I only imagine extra parasitic capacitances to form rather than any issues re oscillation/stability.

For the bottom layer, is the star power distribution correct? I have both planes stitched as ground. Is it ok to place the decoupling capacitors on the bottom side?

3. Via stitching:
I know its ugly, but does it look sufficient? Would it cause any issues?

Also, I know the two pads at the input would act as parallel plate capacitors, the capacitance is large enough as such that it does not affect the design. They are intended for soldering probe pins/connections to.

Thanks for taking the time to read.
julianhigginson:
First up, is that only a two layer PCB? Or are there inner layers?
Nitrousoxide:
Two layer only. All signal traces are on top layer to form a waveguide stripline.

I'm trying to minimize the layer count. And I figured that I wouldn't need any inner layers since im not routing the signal through them, and I can get power distribution correct without them.
awallin:
schematic?
looks reasonably ok to me ;) it's probably best to build it and learn from the 1st prototype than to debate for weeks or months  :P

many op-amps have a grounded pad underneath - to allow changing/comparing op-amps you might design your pcb for an exposed-pad op-amp?

For the +/- supply voltages it would be nice if they both came from a +5V USB-connector.. but maybe this adds too much complexity for a first try.
Noise from the USB and DC-DC chips might be an issue also..

Nitrousoxide:

--- Quote from: awallin on December 05, 2018, 09:11:21 am ---many op-amps have a grounded pad underneath - to allow changing/comparing op-amps you might design your pcb for an exposed-pad op-amp?

For the +/- supply voltages it would be nice if they both came from a +5V USB-connector.. but maybe this adds too much complexity for a first try.
Noise from the USB and DC-DC chips might be an issue also..

--- End quote ---

Could you please clarify what you mean by an "exposed-pad op-amp"? (EDIT: OH! You mean like SOIC? Its a SOIC8 package) I normally flood fill under op amps, thats no issue. The main worry I had was pathing a few 100 MHz trace underneath.

I really contemplated placing a converter on the board. Or making the entire system a single supply. But in the end, I decided to do all of it externally since I have yet to decide the power source (if i should just strap together a linear supply fed from a bench supply).

The one thing I absolutely hate (could just be me) is the use of standard USB connectors with nonstandard pinouts. I can just foresee something exploding.  :-BROKE
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