Differential active RF probe design queries

[Nitrousoxide]

Hello all,

I've decided that it would be a good learning exercise to layout an active probe. The desired operating range would approximately be between 100kHz and 1GHz. The layout is pretty much complete, however, I do have a few uncertainties and questions.

Top layer:


Bottom layer:


1. Controlling impedance:
I had used saturnPCB's calculator to find the ideal width for a trace to have a line impedance of 50 ohms per manufacturing specs (0.6mm pcb thickness, 6 mil gap) for a coplanar waveguide. This gave me a trace width of about 25mils.

As a sanity check, does this width seem reasonable? I know over super short lengths (relative to frequency) it doesn't become that much of an issue, Just wanted to make sure.
Most PCB manufacturers offer the option to control trace impedance, is this entirely necessary considering that I have attempted to do that in the design? Does this just refer to materials used? Or will they modify the design to attain a 50 ohm impedance?

2. Problem areas:
There are a few problem areas that I have issues with. Following the signal path (black line), the first region selected by white are two parallel capacitors. Now, would the asymmetry in path lengths cause an issue for high frequency? (This also occurs on the input too) Would I need to length match due to potential phase shift? (Im asking for "from experience" cases, rather than purely mathematical)

Secondly, the trace for the OPAMP feedback and output (as highlighted by the second white region). Is it ok to run the feedback trace under the device? I know the substrate is tied to (AC) ground, so I only imagine extra parasitic capacitances to form rather than any issues re oscillation/stability.

For the bottom layer, is the star power distribution correct? I have both planes stitched as ground. Is it ok to place the decoupling capacitors on the bottom side?

3. Via stitching:
I know its ugly, but does it look sufficient? Would it cause any issues?

Also, I know the two pads at the input would act as parallel plate capacitors, the capacitance is large enough as such that it does not affect the design. They are intended for soldering probe pins/connections to.

Thanks for taking the time to read.

[julianhigginson]

First up, is that only a two layer PCB? Or are there inner layers?

[Nitrousoxide]

Two layer only. All signal traces are on top layer to form a waveguide stripline.

I'm trying to minimize the layer count. And I figured that I wouldn't need any inner layers since im not routing the signal through them, and I can get power distribution correct without them.

[awallin]

schematic?
looks reasonably ok to me it's probably best to build it and learn from the 1st prototype than to debate for weeks or months 

many op-amps have a grounded pad underneath - to allow changing/comparing op-amps you might design your pcb for an exposed-pad op-amp?

For the +/- supply voltages it would be nice if they both came from a +5V USB-connector.. but maybe this adds too much complexity for a first try.
Noise from the USB and DC-DC chips might be an issue also..

[Nitrousoxide]

many op-amps have a grounded pad underneath - to allow changing/comparing op-amps you might design your pcb for an exposed-pad op-amp?

For the +/- supply voltages it would be nice if they both came from a +5V USB-connector.. but maybe this adds too much complexity for a first try.
Noise from the USB and DC-DC chips might be an issue also..

Could you please clarify what you mean by an "exposed-pad op-amp"? (EDIT: OH! You mean like SOIC? Its a SOIC8 package) I normally flood fill under op amps, thats no issue. The main worry I had was pathing a few 100 MHz trace underneath.

I really contemplated placing a converter on the board. Or making the entire system a single supply. But in the end, I decided to do all of it externally since I have yet to decide the power source (if i should just strap together a linear supply fed from a bench supply).

The one thing I absolutely hate (could just be me) is the use of standard USB connectors with nonstandard pinouts. I can just foresee something exploding. 

[dzseki]

Probably not that relevant but I would just remove all thermals from the ground vias, they have no purpose other than increasing the grounding impedance...

[Nitrousoxide]

Probably not that relevant but I would just remove all thermals from the ground vias, they have no purpose other than increasing the grounding impedance...

Good spot, thank you very much.

[pigrew]

I'd probably route the power along the edge of the board, in order to keep the bottom ground pristine under the RF elements. Perhaps remove the GND under the SMA pin on the top, so the pin doesn't short to the ground accidentally. What is the block of metal on the bottom under the input connectors? Shouldn't it be grounded? Do you need a series 50-ohm resistor (or pair of 100 in parallel) on the output to set the output impedance? A schematic would help. What is the shunt component on the output? ESD protection diode?

I doubt that it helps much to have the groups of four GND vias, perhaps distribute them more evenly? Maybe add a spot to add a bit of resistance or a ferrite to the voltage inputs, in order to filter HF?

Add a capacitor+resistor on the input to force some particular input impedance??? (Maybe you have this already on the schematic?)

Also, perhaps change to a through-hole connector on the input, in order to have better mechanical stability?

The layout is so defined by component sizes and not trace widths that I don't think that the trace's impedance will have much of an effect at 1 GHz. Probably down-sizing components could help, but I don't have enough experience to say what size to use at 1 GHz.

Round the corners of the board and perhaps add some mounting holes?

[Nitrousoxide]

1. I'd probably route the power along the edge of the board, in order to keep the bottom ground pristine under the RF elements.

2. Perhaps remove the GND under the SMA pin on the top, so the pin doesn't short to the ground accidentally.

3. What is the block of metal on the bottom under the input connectors? Shouldn't it be grounded?

4. Do you need a series 50-ohm resistor (or pair of 100 in parallel) on the output to set the output impedance? A schematic would help. What is the shunt component on the output? ESD protection diode?

5. I doubt that it helps much to have the groups of four GND vias, perhaps distribute them more evenly? Maybe add a spot to add a bit of resistance or a ferrite to the voltage inputs, in order to filter HF?

6. Add a capacitor+resistor on the input to force some particular input impedance??? (Maybe you have this already on the schematic?)

7. Also, perhaps change to a through-hole connector on the input, in order to have better mechanical stability?

The layout is so defined by component sizes and not trace widths that I don't think that the trace's impedance will have much of an effect at 1 GHz. Probably down-sizing components could help, but I don't have enough experience to say what size to use at 1 GHz.

Round the corners of the board and perhaps add some mounting holes?

I numbered and addressed these in order:

1. Thanks, will route power along edges.

2. Would that really be an issue? I don't see it happening if it is soldered like any other component. Plus, not that it's critical for this frequency. But for much, much higher frequencies would you not need to maintain the coplanar waveguide for the entire transmission line?

3. Yes. it should be. However, I was having issues with peeling back soldermask on Altium. I realised you had to do it in the "Bottom solder" layer.

4. Added series 50 ohm termination. The shunt component was for an optional protection device.

5. Shifted around all the vias to be more uniform (that was my original intent). Attempted to use Altium's automatic via stitching feature. I guess its kinda useful if you're working on large boards. Takes a bit to tweak the numbers right.

6. Yes. Input already has a 10 Meg nominal impedance. One of the potential problems I might have is the distance mismatch between the two paths. (Highlighted in white in the first post) Im not too sure if that would cause any issues.

7. I havent really given mechanical stability much thought. I dont really intend to stress the probe that much. Final thoughts would be to place it in a snap together case and just use a clamp to hold it. Or to simply not stress it too much.

I also reshaped the front of the board to remove excess copper.

Top:

Bottom:

[dzseki]

I'd wote against ground pour under the input connector pads, as it acts as a considerable (single ended) capacitance to ground. Also you do a favour for yourself if you'd choose a lower input impedance than 10M, because you can be very sure at 1GHz you input impedance will be nowhere near to that, as it will be governed by parasitic capacitances.  That wide range of input impedance change can lead to funny (missleading) things during measurements.