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DIP version of voltage level converter SN74LVC1T45 ?

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FrankBuss:

--- Quote from: OM222O on April 11, 2019, 12:03:26 am ---you are over complicating this way too much!
just use a hex inverter and connect each 2 inverters back to back to from a basic buffer. if you power the inverter from 3.3V you can get 5v downto 3.3V conversion and if you power it from 5 volts, you get 3.3v to 5v conversion. it is extremely cheap and should be able to support speeds you want. also because they are logic chips, your edges will be clean as!

if you need more than 3 channels, just use more chips, they are dip 14 packages anyways.

--- End quote ---

I don't think this would work reliable. Not all chips tolerate 5 V if powered from 3.3 V and not all chips powered from 5 V have as low as 2 V min high level voltage. And some inverters can be quite slow, like a 74LS14 can be max 22 ns, so this would be 44 ns for two inverters. Too slow for 20 MHz, because first the clock gets translated, and then the output of the flash chip gets translated back again, which then would be too much phase shifted to the original clock for a reliable SPI detection.

But I think the 2 chips I selected with the hints from oPossum should work.

OM222O:
http://www.ti.com/lit/ds/symlink/sn74hc04.pdf

look at that part. I have tried it with many projects, especially in SPI up conversion (3.3 to 5), but in practice, if you want down conversion, you should use some resistors (1k is more than enough) to limit the current and the internal zener clamps would take care of the rest.if you are paranoid, you can use 10k resistors as well.
those chips will work but they are not easy to find pin compatible replacements for, and probably cost more (it matters a lot in volume). trust me, this is as solid of an option as you can get. it has worked amazingly well over the past years and is a common solution.

edit: the switching frequency changes depending on the VCC, but it should still be fine at 20MHz (2 propagation delays is about 40ns max).

FrankBuss:
If I use a 10 k series resistor, then it could be too slow. And on the 3.3 V power supply is only the flash at the moment, so if I use a 1 k resistor, the supply voltage could rise, especially when the flash is in sleep mode. And the datasheet of your 74HC04 says when powered at 2 V, the propagation delay can be up to 95 ns, so at 3.3 V it would be between 95 ns and the 19 ns for 4.5 V. It is an inverter, and for SPI it would be 3x delay (clock in one direction, with two gates, MISO in the other direction, I can invert it in software, so 1 gate). I really don't think this would work reliable with 20 MHz.

OM222O:
5v/1k = 5mA and the maximum rating is about 20mA or so. again, 10k is if you are paranoid and it won't slow down anything (the input capacitance is too small at these values)
also looking at figure 2:

at 3.3V propagation delays are just slightly over 20ns. if you are seriously concerned that much about speed, spi has 4 modes. you can simply change your input / output mode to match one inversion at either end (any modern MCU has all 4 options). but I would suggest you do actual testing as it's almost guaranteed even 2 propagation delays are fine in your case.

in terms of your 3v regulations, I'm not sure what you are using that will be so poorly regulated that some switching can cause spikes ... even then, that's exactly what decoupling capacitors are used for?
In case there is a misunderstanding, I meant 1k resistor on the inputs, not the supply rail itself!

Edit: these 3 channels work in parallel and propagation delays are the same regardless of the input singal, so clock is inverted with the same delay as data line (within the specified tolerances that is) so there is not much phase shift, if any! I'm not sure why you would use 2 gates for clock and one for MISO/MOSI? that is actually a use case which can cause issues. just use the same number of gates for all signals.

oPossum:

--- Quote from: OM222O on April 11, 2019, 12:16:39 am ---http://www.ti.com/lit/ds/symlink/sn74hc04.pdf

look at that part.

--- End quote ---

Yes. Look at the specs carefully. The logic high is out of spec when 3.3V logic is used with Vcc of 5.0V.


--- Quote --- you should use some resistors (1k is more than enough) to limit the current and the internal zener clamps would take care of the rest.if you are paranoid, you can use 10k resistors as well.

--- End quote ---

Makes the square wave un-square and that is un-good.


--- Quote ---trust me, this is as solid of an option as you can get. it has worked amazingly well over the past years and is a common solution.

--- End quote ---

There is a difference between something that 'works' and something that is well designed.

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