Discrete active cell balancing circuit.

[Refrigerator]

Lithium cells need to be balanced from time to time and the simplest and most common way to do that is to just bleed off excess energy from high cells into a resistor.
But i don't like that so i came up with my own active cell balancing circuit.
The point as always is to keep it both practical and inexpensive, which this circuit is on the verge of achieving.
It is based on a two-switch forward converter and uses an inductor instead of a transformer.
Other cell balancing circuits i've seen use transformers or capacitors to balance cells but i don't like that approach.
Transformers are hardly scalable, because with each new cell the transformer needs to be rewound.
And capacitor based balancers are not great and their effectiveness drops off as the difference in voltage between cells decreases.
There are IC's that do active cell balancing like the ETA3000 and it seems pretty good at first.
They're meant for two cells so to get more cells you chain them together, which works but there is a possibility that two balancers will discharge two high cells into one low cell, possibly overloading the cell.
General availability is also a problem.
The balancer circuit i came up with is not yet finished and needs some tweaking still but it already has an efficiency above 80%.
It makes use of widely available and inexpensive components.
The previous mentioned ETA3000 boasts an efficiency of up to 92% but that's only between adjacent cells.
To transfer the energy from one cell to a cell that is more than one cell away it would need to pass through another ETA3000 dropping the efficiency down to 84.6%, and lower for further cells.
So compared to that my circuit seems promising.
But it is not self-operating, meaning that it has to be controlled by an external controller through PWM, which is what i intend to do anyways.
Currently i'm testing my cell voltage converter circuit and when i'm done i might build this active balancing circuit as well.

What do you guys think? Is active balancing worth the added complexity or no?

Edit: V1 and V2 are two series cells in a pack, V3 is the PWM source and V4 is a 10S pack, of which V1 and V2 would be part of.

[Refrigerator]

Looks like the circuit lays out on a single sided board quite nicely.
But it's not finished yet so there might still be surprises.

[bborisov567]

Did you manage to build and test the circuit?

[max_torque]

so you don't "like" passive balancing?

Did you know that pretty much zero commercially available battery projects use active balancing?

Did you know that mostly balancing is a complete waste of time and resouce, and really only does anything in extemis?

Did you know the best option to avoid ballancing is to simply use well matched high quality cells?


For any project where cell working currents are above around 1 or 2 A, balancing can never keep up with normal demands (discharge and charge) so it can never actually deliver any significant extra available capacity.  What you are doing though is adding a massive amount of complexity and cost that is far better just spent on better cells ime!

(for note, i've deveoped battery storage systems for OEM automotive, motorsport (F1 & FE), Aerospace and defense applications, from 200Wh to 200MWh !!)

[bborisov567]

It is more about the concept. Nobody likes to waste energy in heat dissipation. Right now it might be too expensive and complicated to use active balancing but this doesn't mean one should forget about the idea. Every great technology is great because of the development that went behind it. You can take SMPSs as an example - 50 years ago it use crazy expensive to use SMPS compared to a transformer but thanks to the advancement that happened into many aspects nowadays it is hard to even buy a regular old transformer.

[macboy]

so you don't "like" passive balancing?

Did you know that pretty much zero commercially available battery projects use active balancing?

Did you know that mostly balancing is a complete waste of time and resouce, and really only does anything in extemis?

Did you know the best option to avoid ballancing is to simply use well matched high quality cells?


For any project where cell working currents are above around 1 or 2 A, balancing can never keep up with normal demands (discharge and charge) so it can never actually deliver any significant extra available capacity.  What you are doing though is adding a massive amount of complexity and cost that is far better just spent on better cells ime!

(for note, i've deveoped battery storage systems for OEM automotive, motorsport (F1 & FE), Aerospace and defense applications, from 200Wh to 200MWh !!)

Dyson agrees with you and designs their vacuums with six high quality cells and no balancing. They work well until they don't. At some point the battery becomes so unbalanced that the BMS shuts down permanently. The cells still have plenty of lifetime left, but the battery can no longer be charged nor discharged due to the severe imbalance. Many people including myself have fixed these packs by manually balancing the cells, then flashing a new firmware which un-bricks the BMS and can notify the user of the state of balance so that they can perform maintenance (disassembly and manual balancing).

I agree with you that balancing is mostly a waste of time and energy, but it isn't universally true.

[Geoff-AU]

It is more about the concept. Nobody likes to waste energy in heat dissipation.

Sure, but now you have mined and transported more minerals from the earth, and spent energy making components that do a job that can be perfectly achieved using a simple resistor.  You have just shifted the energy usage from point-of-use to point-of-manufacture.

Add to that, cells do not drift much from cycle to cycle.  The rate of balancing you need on an ongoing basis for any pack is really quite low.

Not balancing cells at all is planned obsolescence.

I agree that it's very much worth remembering the concept.  It may find better uses in something else.

[Marco]

Doesn't Tesla actively bleed the highest voltage batteries when charging to 100%?

[Doctorandus_P]

Have you ever calculated how much energy such a passive balancing circuit "wastes"? Overall, it is only a small proportion of the total charge, depending on the difference in capacity between the individual cells. And that capacity difference is then equalized by draining one or a few of the cells. and a few more if the battery is nearing 100% full. And by that time you have excess energy you can't store in the battery anymore (when solar or wind etc).

But more important. I do not like your circuit, because it's much too complex. Charge balancing is mostly a safety and overload protection circuit, and this makes reliability paramount. More parts reduce reliability. If one of the balancing circuits fails a cell may catch fire, and take down the whole battery pack and more with it.

So therefore, it looks to me you are optimizing for the wrong parameters.

[KerimF]

It seems there are many topologies of active balancers.

Lately, I am designing (hardware and software) the one (for two 12V acid batteries in series) that has an auxiliary capacitor by which charges are transferred from one battery to the other. Two pairs of N-MOSFET and P-MOSFET are used as switches.

While the circuit is somehow simple, the code of the MCU (ATmega8) has to adjust the switching rate continuously so that the rate of the transferred charges is around a fixed value (5 A average current for example). But this current decreases gradually when the voltage difference becomes below 0.75 V in order to limit the switching frequency at around 5 KHz (500 Hz when dV=2.5 V).

This is my first attempt, so I am curious to know the surprises which are waiting till I finish the first prototype.

Added:
Here is the schematic, A59S_Balancer_03.pdf.

Edited:
See A59S_Balancer_04.pdf (Reply #12).

[Marco]

The simplest which can operate at decent speeds is probably switched bleed resistors (which I think Tesla uses, for 100% charging only). So once you get near full charge, you occasionally stop charging, measure open cell voltage, then activate the bleed resistors on the full cells and resume charging. No need for a balance charger, just one MOSFET per parallel set. Only problem is heat.

[KerimF]

The simplest which can operate at decent speeds is probably switched bleed resistors (which I think Tesla uses, for 100% charging only). So once you get near full charge, you occasionally stop charging, measure open cell voltage, then activate the bleed resistors on the full cells and resume charging. No need for a balance charger, just one MOSFET per parallel set. Only problem is heat.

This is indeed a practical solution when the mains electricity is available 24/24.
In my city, it was 24/24 before year 2011. It became 4/24, at best, after the world saved the people among whom I was born and live!
Although many families and offices keep installing solar panels (of various power), their batteries may not reach the full capacity every day, mainly in winter.

[KerimF]

When I started writing the balancer’s code, I recalled that the default state of ATmega8 I/O pins at boot is tri-state (floating).

I updated the circuit (A59S_Balancer_03.pdf, reply #9) so that, at boot, the two N-MOSFETs are also off (A59S_Balancer_04.pdf).

[Refrigerator]

Did you manage to build and test the circuit?

No i couldn't find the time to test it, unfortunately.

[KerimF]

After I finished designing the balancer, and the simulation of its hardware/firmware gave me the expected result (after fixing many bugs), I drew and sent its PCB layout (one face) to a local service in my city.
Today, I received the board. I will likely test the balancer in real on next Monday (on two 150 AH acid batteries connected in series). 

[bborisov567]

@KerimF Great to hear there is a progress. I would love to see some test results, maybe what is the overall efficiency of the circuit. Also can you share a block diagram of the code, that would be interesting to see.

[KerimF]

@KerimF Great to hear there is a progress. I would love to see some test results, maybe what is the overall efficiency of the circuit. Also can you share a block diagram of the code, that would be interesting to see.

Hi,

Unfortunately, I couldn't finish the board, as planned, waiting to get the P-MOSFET IRF5210 (or equivalent). I also got this year a rather serious cold (I usually expect it in fall season) but I am recovering now.
About the efficiency, how do you suggest it could be measured?
Based on my calculations (using Excel and its solver since the main equations of the charging/discharging process via the auxiliary capacitor are non-linear) I limited the power dissipation of each pair of MOSFET to about 5W (10 W total).
At this dissipation limit, the transferred current from one battery to another varies with their voltage difference, dv. At dv=2.5V, I ~=5A, At dv=1.1V, I ~=7A. Then, the transferred current starts to decrease following the decrease of dv.
I limited the shortest period of time of the charging (discharging) current to 210us, when dv<1.1V. The longest one is 4200 us at dv=2.5V.

When I started programming CPUs (as Z80) then MCUs, I had to write my codes in their assembly language only (provided on their datasheets). Since many decades ago, I don't have the privilege to download and install any high language compiler for them, free or paid, including their resources. Lately, I use the AVR MCU, ATmega8 (the only one available around me). If uploading my assembly code interests you, I will try to clean it first from comments that are not related to the actual code directly.

Kerim

[bborisov567]

At this dissipation limit, the transferred current from one battery to another varies with their voltage difference, dv. At dv=2.5V, I ~=5A, At dv=1.1V, I ~=7A. Then, the transferred current starts to decrease following the decrease of dv.
I limited the shortest period of time of the charging (discharging) current to 210us, when dv<1.1V. The longest one is 4200 us at dv=2.5V.

I believe that you need to have the longest time and lowest current when dv is at least and then play with the time to get constant energy flowing. Correct me if i am wrong. As for efficiency you can measure the dissipated power on the mosfets and compared it to the total power need for charging.

[KerimF]

At this dissipation limit, the transferred current from one battery to another varies with their voltage difference, dv. At dv=2.5V, I ~=5A, At dv=1.1V, I ~=7A. Then, the transferred current starts to decrease following the decrease of dv.
I limited the shortest period of time of the charging (discharging) current to 210us, when dv<1.1V. The longest one is 4200 us at dv=2.5V.

I believe that you need to have the longest time and lowest current when dv is at least and then play with the time to get constant energy flowing.

You may be right.
So, I wonder if you like that we discuss together about the transferred current (or charge) numerically while applying and solving the appropriate formulas.
This will help me revise with you what I did to find out if I still miss something to consider in my calculations.

Kerim

[bborisov567]

Definitely would be interesting to discuss the calculations. Maybe you can post your spreadsheet as a starting point.

[KerimF]

The following is the illustration of the calculations in their basic general form.

Let us define the first variables and their possible initial condition:

V1 = the voltage of the first/bottom battery, batt_1 = 12V
V2 = the voltage of the second/upper battery, batt_2 = 14V
Caux = the capacitance of the auxiliary capacitor = 9400uF
Vc = the voltage of the auxiliary capacitor = 12V (=V1, the lower one)
Rs_p = Rds_on of the two P_MOS while charging Caux =120mR
Rs_b2 = the internal battery resistance of Batt2 and wires = 20mR

dV = V2-V1 = 2V
RCp = Caux *( Rs_p + Rs_b2) = 1316us
Im = dV / ( Rs_p + Rs_b2) = 14.286 A

Now, let us recall some formulas:
I (t)= Im*e^(-t/ RC)
Where
I(t) = the current at the time t

Integrating I(t) from t=0 to T, we get:
Iavg = Im * RC * [ 1 - e^(-T/RC) ] / T

Integrating I(t)^2  from t=0 to T, we get:
Irms^2 = Im^2 / (2/RC)*[ 1 - e^(-2*T/RC) ] / T

Where
T = the ON time of the two P_MOS
 
Are there any comments before I go on? Thank you.

Kerim

[bborisov567]

In

" RCp = Caux *( Rs_p + Rs_b2) = 1316us

i believe you should include some typical value for the battery internal resistance+the ESR of the capacitor. Have you also consider the idea of using MLCC capacitor of lower value but switched at a higher frequency? Electrolytic capacitors have quite a big ESR. It has to be evaluated whether the loses of switching smaller capacitor with lower ESR will be more than the loses of switching a big capacitor with higher ESR at a lower frequency. Another idea that comes to my mind is if you can monitor the voltage on the capacitor fast enough you can directly regulate Ton but i am not sure of the capabilities of the Atmega. And one last thing - where do you plan to get 24 V? You can consider using gate drivers for the mosfets if the budget allows it.

[KerimF]

 

In

" RCp = Caux *( Rs_p + Rs_b2) = 1316us

i believe you should include some typical value for the battery internal resistance+the ESR of the capacitor. Have you also consider the idea of using MLCC capacitor of lower value but switched at a higher frequency? Electrolytic capacitors have quite a big ESR. It has to be evaluated whether the loses of switching smaller capacitor with lower ESR will be more than the loses of switching a big capacitor with higher ESR at a lower frequency. Another idea that comes to my mind is if you can monitor the voltage on the capacitor fast enough you can directly regulate Ton but i am not sure of the capabilities of the Atmega. And one last thing - where do you plan to get 24 V? You can consider using gate drivers for the mosfets if the budget allows it.

Thank you for your interesting remarks.

Do you have an idea of the typical value for the battery internal resistance + the wirings? I assumed it 20 mR which could be considered a typical minimum value.

Big electrolytic capacitors (here 2*4700uF/35V) have typically a relatively low ESR. For the ones I have ESR~=5mR.
To monitor the floating capacitor, 2 ADC readings are needed (unless we add a differential amplifier to use 1 ADC only). This is not really necessary for my economical balancer. The proper calculations can predict the average and the RMS values of the transferred current during the charging and discharging of the capacitor for different values of the parameters of interest.

About the gate drivers, I can't get suitable gate driver ICs. This is why I tend to use rather low switching frequencies.

"...where do you plan to get 24 V?" sorry, I couldn't get what you mean. I have two 12V batteries in series and a capacitor.

While designing a controller, there are usually priorities to fulfill first. The priority for my balancer is to make it reliable; in other words, not to be damaged in any possible natural condition. For example, before starting every cycle of charging/discharging the capacitor, the MCU sees if all voltages are within limits (not too high, not too low). If they are not, it keeps monitoring them while all MOSFETs are off. The reason for which I started designing it is that, as I was told, the imported ones don’t last long and need to be repaired once a while!

After my last post, I revised my calculations step by step thinking I will post them here. Although my previous ones gave me that the total MOSFETs dissipation is around 10W, and the average transferred current is around 6A, the new ones showed lower values; 4W and 2.8A respectively.

I mean I will update my excel sheet to double the last values. For instance, the values that are needed by my code are the times (in us) of the charging and discharging which will be listed on two tables. I started with V(batt_2) > V(Batt_1). So, I will also check if the same two tables are valid when V(Batt_1) > V(Batt_2). The index of these tables follows dV; it is 0 for dV=0.01V and 249 for dV=2.50V. These times will be calculated for certain fixed MOSFET dissipation (thanks to the Excel Solver), say 8W (each pair 4W) for example.

I can’t cover all points in the design in a small space like here.
I started designing various products, hardware and firmware, for the local consumers since 1980 (as needed in every period of time). Naturally, I became aware of many solutions while designing a new product. But I have to choose what I can built (with what I have) and let it compete, as possible, similar imported ones (this is how I used to gain my daily bread and of my few assistants for the last 45 years).

You likely know how to build such a balancer when you will need it. And you will obviously do it with what you can get (or order from abroad). Since we live in two different worlds (due to the world’s regulations, since many decades ago), our balancers have to be different too, we like it or not. I mean what I may present here will likely be seen by most readers a sort of an academic study only.

Kerim

[KerimF]

Hi,

As I mentioned earlier, the purpose of the calculations is to find out the optimum values of the capacitor charging and discharging times, in function of the two batteries voltage difference, dV.
I meant by the ‘optimum’ when the average transferred current is at its possible maximum without exceeding the maximum of the total MOSFET dissipation, say 10W.

Let us recall that, in the steady state, the algebraic sum of charges that charge and discharge the capacitor is zero.
I attached an Excel sheet for dV=1.5V. I noticed that it is not easy, even by using the Excel Solver, to get its two optimum times (for the assumed values of the various parameters).

But those who like and enjoy playing with numbers and equations, as I do, may find a better way to get the two times for every dV (dV = V_batt2 - V_Batt1) from 0.01V up to 2.5V (10mV step).

For instance, if we don't need finding the optimum times, solving them becomes relatively easy. In this case, the discharging time could be made fixed and equal to about 4 to 5 times RC. This returns the capacitor voltage back to its starting one (actually very close) at the end of every cycle. Then, the charging time could be found for dV=2.5V (supposed to be the maximum allowed difference) for which the total MOSFET dissipation is maximum, say 10W (5W each pair).

Kerim

[KerimF]

Hi,

So far, I got the two tables (attached, TimesTable_v1.txt) of the capacitor charging and discharging times (us, in function of dV) which let, in the steady state, the average transferred current be maximum (actually close to maximum) and satisfy the condition MOSFET Ptot < 10 W.

One table is for V(batt2) > V(batt1) and the other for V(batt1) > V(batt2). In both cases, the discharging time is fixed, 200 us and 700 us respectively. 

The size of their Excel file is 4 MB, so I am not sure if it can be attached.

Kerim