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Divide by 10000000

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jimmc:
I can't help with all outputs available at once but I do have some code that will provide switch selectable frequencies from a 10MHz source using an ATtiny85.
Extract from my notes about a GPSDO which I've had running for a while now...

A range of output frequencies is provided by a second ATtiny85 again clocked from the OCXO.
It also provides a fixed 10MHz output from its clock buffer pin.
 
A 10 way switch is used to select frequencies of Off, 5M, 2.5M, 1M, 100k, 10k, 1k, 100, 10 or 1Hz
(Off position ensures no subharmonics on 10MHz output.)
 
ATtiny85 has limited number of I/O pins so resistor chain and (single) Analog Input pin was used.
Running the A/D continuously would compromise output purity so the comparator was used to generate interrupt when switch position changed.
This was achieved by the use of ten resistors in two chains arranged such that odd switch positions give voltages below the internal comparator reference (1.1v) and even positions give voltages above.
The ‘interrupt on comparator change’ function is then used to start the A/D only when required.
(The switch I used was MBB so the wiper was always connected. A stop was required between positions 1 and 10 to avoid shorting the supply.)

(My first attempt at writing AVR assembler so please be gentle, I'm more used to coding with a soldering iron.)


asm & hex files attached in the zip

Jim

IDEngineer:
It occurs to me that one could daisy-chain two 16 bit Compare modules in an MCU and create a one-chip purely hardware solution, with one Compare module acting as a prescaler for the other.

Example: In the PIC18F family, Timers can be clocked by an external pin. The associated CCP module can control an output pin. The first CCP can take in the original signal, and its output pin can be hardwired to the input pin of the second Timer. The second CCP's output pin then becomes your divided output signal. You'd have 32 bits of divisor, and by setting that to 50% of the desired value you'd get a 50% duty cycle output waveform implemented purely in hardware. If your use of the output signal is edge sensitive, you're good to go.

The firmware's only job would be to configure the Timer and CCP modules. Thereafter, the hardware would run autonomously with no firmware involvement at all. This completely eliminates the question of firmware latency, eases the fear of those concerned about Assembly language, etc. Just put the firmware in a tight loop that does nothing. It might even be possible to halt code execution to save power and reduce noise. Putting the core into a light sleep mode might do it, many peripheral modules can be configured to continue hardware operation while the core is asleep.

The one hangup is maximum Timer input frequency. A quick glance at the PIC18F family reveals that 10MHz is a bit too fast. But the concept still holds, and other families (from other manufacturers?) may support the frequency in question. Looks like the PIC18F would handle inputs under 5MHz, for example.

Just another way of looking at the "problem". An MCU can sometimes be used as a programmable logic block without direct ongoing firmware involvement.

Gyro:

--- Quote from: Howardlong on December 05, 2019, 11:33:38 am ---Today’s bloat programmers approach this using all the flash available filling it with nearly 10 million NOPs, two GPIO twiddles and a jump, and have plenty of time to berate the greybeards who achieved the same task in a dozen bytes of object code.

--- End quote ---

Oh I don't know, Don Lancaster was using much the same technique to generate video timings back it the '70s.

magic:
Latest AVRs can cascade timers without wiring up physical pins, and supposedly many ARMs can too.

But really, look at the dates :scared:
You responded to a question asked 2 years ago which has been bumped by somebody with a related but slightly different problem ;)

IDEngineer:
Yeah, I saw that, but since the thread got resurrected I thought somebody might search it someday.

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