Electronics > Projects, Designs, and Technical Stuff
Divide by 10000000
perdrix:
I think you'll find that the 2pS figure is in the right ballpark.
The guy who did that really knows his stuff, is a real expert on the bleeding edge of precision timekeeping.
David
eb4fbz:
I think you should never use interrupts for this because the unpredictable interrupt latency would introduce some jitter. Just nops and loops should be fine.
jimmc:
--- Quote from: eb4fbz on December 06, 2019, 10:34:50 pm ---I think you should never use interrupts for this because the unpredictable interrupt latency would introduce some jitter. Just nops and loops should be fine.
--- End quote ---
In general I would agree, however if the MCU does nothing but sleep waiting for an interrupt which is synchronous with the system clock then latency is fixed and not a problem.
In the example I posted earlier there are two sources of interrupts, Timer1 which meets the above criteria and Analog comparator which is effectively resets everything.
Jim
Howardlong:
--- Quote from: Gyro on December 06, 2019, 08:02:27 pm ---
--- Quote from: Howardlong on December 05, 2019, 11:33:38 am ---Today’s bloat programmers approach this using all the flash available filling it with nearly 10 million NOPs, two GPIO twiddles and a jump, and have plenty of time to berate the greybeards who achieved the same task in a dozen bytes of object code.
--- End quote ---
Oh I don't know, Don Lancaster was using much the same technique to generate video timings back it the '70s.
--- End quote ---
Back in those days such jiggery pokery was for sound engineering reasons, where the overriding design axiom was to keep costs down: it also coincided with a golden age when real programmers knew the cycle count of each instruction and cared about code size, speed and determinism... I am not sure many of today’s programmers would know where to start on those facets!
bingo600:
--- Quote from: eb4fbz on December 06, 2019, 10:34:50 pm ---I think you should never use interrupts for this because the unpredictable interrupt latency would introduce some jitter. Just nops and loops should be fine.
--- End quote ---
Arm NVIC has predictable IRQ's , that was a design goal in the Cortex.
But a decent ARM , prob has enough 32 & 16 bit timers + OCR regs to do it all from timers ... 5..10 outputs.
NXP used to have several 32bit timers , and TI too , STM has a few in the larger packets.
/Bingo
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