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DIY Modular Test Equipment Project

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void_error:
Small progress update:

After messing around with the idea of using RS-422/RS-485 transceivers I ditched it in favor of LVDS/M-LVDS. Since I also want to reduce crosstalk between pairs I'll be upping the pin count of the bus connector to 40 pins to allow for ground between pairs, although I'm not sure if the differential impedance will affect signal integrity and/or reflections across the ribbon cable too much at the rather low speeds the SPI will be running at - 16MHz clock or lower.
Also, the glue logic used to switch between SPI and the shift register lines will be moved to each individual board so there's only going to be one differential SPI line with an extra line to select who gets clock and data.

Another problem I ran into is having to sample voltage and current simultaneously and while there are simultaneous sampling ADCs out there I couldn't find anything suitable at a reasonable price so I'm opting for a bit of a hack here: clock both AD7683s at the same time, with one outputting it's data directly into the MISO line, while the other outputs into a 24-bit SRAM made out of D-type flip-flops. To get the data from the makeshift SRAM there's going to be a pin used in the same way as the ADC Chip Select. And in case you were wondering, there's a pin-compatible replacement from TI for the currently used ADC which is slightly cheaper - ADS8326.

void_error:
Minor setback: graphics card RAM died and I have no onboard graphics. Result: Windows commited suicide while attempthing to repair itself.
Took this as an opportunity to boot linux mint in text mode off a USB flash drive and use lynx to navigate the interwebz and also post this simply because I can and I hate typing on my smartphone.
The good thing is that the card's under warranty for another 3 months so I should be getting a replacement within the next 2 weeks so I can get back to adding LVDS to all the boards...
Speaking of which, the GPO and GPI lines will be gone and a trigger line will be added.

prasimix:

--- Quote from: void_error on April 10, 2018, 05:17:09 pm ---Another problem I ran into is having to sample voltage and current simultaneously and while there are simultaneous sampling ADCs out there I couldn't find anything suitable at a reasonable price so I'm opting for a bit of a hack here: clock both AD7683s at the same time, with one outputting it's data directly into the MISO line, while the other outputs into a 24-bit SRAM made out of D-type flip-flops. To get the data from the makeshift SRAM there's going to be a pin used in the same way as the ADC Chip Select. And in case you were wondering, there's a pin-compatible replacement from TI for the currently used ADC which is slightly cheaper - ADS8326.

--- End quote ---

Did you possibly consider ADS131A02? It's 24-bit but with very attractive price.

void_error:
Thanks prasimix, I had a look at the datasheet and it looks like a candidate for for the Power Supply Module, the Electronic Load Module and the Mains Power Meter Module, the only tricky part id the fact that it requires a 16.384MHz clock, which I could provide via the clock line on the bus and will also be used for switching regulator sync after division, the problem being that is I use 4x PLL on the main MCU I'd have to use a 8.192MHz crystal due to the 64MHz maximum clock limit and send the x4 multiplied by the PLL out the CLKR pin after it's divided by 2.
Since the same clock is used by any other MCUs (PIC18F25K40) they'd have to run at 16.384MHz (4.096MHz instruction clock) unless I divide it by 2 and use the 4x PLL multiplier which is not that big of a problem.

On the bright side, my PC is back up and running. Work will resume as soon as I have enough time and energy to put into this which might be totally random.

I managed to mess around with adding LVDS and changing the bus connector yet again to one with more pins (40) and changing the PCB layout for the UI. I've also been looking into the possibility of keeping the ribbon cable for LVDS and it seems like a viable option as long as I keep stub lengths short (>30mm at the moment) and the clock speeds low, with the highest frequency being 16MHz. If anyone knows why this wouldn't work please don't hesitate to let me know.

void_error:
After being stuck for quite some time with having to use two 40-pin connectors on each peripheral board due to the daisy chaining requirement for the 595s which makes PCB layout a complete mess, I've ditched the shift registers and quite a bit of the glue logic in favor of a some of 3-to-8 decoders and a MCP23S08 I/O expander.

The lines formerly going to the 595s are now address lines, a sort of bank select for the MCP23S08s. The chip select lines for the SPI stuff (ADCs, DACs, etc) on each board will be the decoded outputs of another 3-to-8 decoder with the 3 inputs connected to the outputs of the MCP23S08 which also offers a level of idiot-proofness (is this a real word?) in the sense that only one chip select can be active at one time in addition to the reduction of the number of lines required on the I/O expander.

I won't be putting any of these changes on GitHub just yet as I still have to fiddle with the pins on the micro when I start working on changing the PCB layout.

Speaking of which... is anyone interested of having the possibility putting your own favorite micro (on a daughter board) so I can add a bunch of pin headers to facilitate that?
EDIT: That would include all of the boards which will have a micro, except for the UI board.

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