DIY-SMU Project

[SebastianH]

It is so quiet over here. No evolution?

In the mean time I completed the PCB design for the amplifier and the main/controller board. It won't be too long before I could order the PCBs for a first prototype. But for the initial tests I'd like to have two current limited +-200V power supplies, but without paying R&S/Keysight money of course. So shall I build that supply first? Then a DC load would be necessary to properly test the power supply and my HP 6060B doesn't go above 60V. So shall I complete my 150V DC load project first, then the power supply and only after that start working on the SMU?   

[ducreux92]

Hi,
 I have a big problem of regulation :

>In range 100mA, when i set 0.8 V for example in FV mode,
i read (in adc) 0.79845 V without charge and 0.79024 with a charge : delta > 1 mV ....

I insist on the fact that I am talking here about the voltage coming from the converter and not that at the load terminal.

The voltage is correct and constant when the current in charge is superior to about 3 mA until 100mA !
I ithink it isn't normal.

[Kleinstein]

Depending on how the voltage is measured, the extra loading at internal points of the circuit from the meter may effect the result. One should do the measurement at the normal points for the load.

There are mainly combinations for current range setting that can effect the stability of the voltage loop. Chances are that not all were fully tested. There is a chance to get some instability that may not be detected so far. So it may be worth checking for some superimposed AC / oscillation, either with or without the load.

[ducreux92]

Thank for your reply.

I specify : when I talk about measuring the voltage, it is the result of the ADC converter not a multimeter.

I experimented with lowering the voltage force to +/-31 V instead of +/-120V, I noticed that the voltage regulation of 0.8v is perfect whatever the load.

In addition, the output voltage varies when I change the intensity range, for a constant load. And it's very annoying: it's not possible to have a constant zero voltage at the output for all the ranges.

[Kleinstein]

Changing the feedback divider for a 31 V range instead of a 120 V range does effect the regulation loop. So one may also have to do a few more changes.

Changing the current range should not effect the output voltage. If it does make a change there is somehing wrong, like oscillation or maybe a wireing fault (e.g. set to external sense but not connecting the sense wires).

[ducreux92]

Always look output with oscilloscope :

I have magnificent oscillations at a frequency of 2.68 Mhz and an amplitude (AC) of 300 mv without charge.

In charge (> 2 mA) no oscillation.

I do not use dc to dc  converter for +/-15V.
On the other hand, I use a power supply of +/- 84V instead +/- 170V : What value to choose for the loop parameters ?

Actually : R35 = 200k, R27 = 2k, i try to reduced R35 without success ...

[ducreux92]

By increasing (C53 + C54) to 470 pF  instead of 270pF/2 this solves the problem.

[ducreux92]

Hi,

Make a simulation with real values like C57 = 150 pF, R73 = 1k, R10 = 200, C55 = 22pF and
with 100mA range : RLoad = =1000000, RIsense = 50 // 100pF.

The results is an oscillation at about 3.5 Mhz ...

[Kleinstein]

Avoiding oscillation for all ranges and all reasonable loads is one of the difficulties. A simulation can help here, as it can be faster and easier with extreme cases (e.g. very low ESR capacitor). However the models may not be that perfect and the real circuit may behave a little different (in both ways). It the similation shows oscillation, chances are the real circuit is not very stable.

For the simulated circuit the capacitance at the output looks rather small - one may need more. Another point is that one few of the OP-amps will actually be LT1057 as in the simulation, though it should not make a large difference, as most of the OP-amps should not be used close to there full GBW.

[ducreux92]

I agree with you, but my smu still oscillates in reality and in simulation I have the same behavior.
I emphasize the importance  of the C57/R73 network in the oscillation phenomenon.

In simulation decrease R10 200 ohms to 25 ohms stop oscillation (keithley uses 27 ohms).

I post an open loop graph (range 100 mA, K3 open, in blue = entry, yellow = output).

[wenyue]

I modified the compensator on U1 and did this SMU loop gain simulation. I got PM around 118 degrees but I got overshoot 200% when I tested by pulse waveform. 
Does anyon know what the loop gain simulation problem?

[Kleinstein]

The loop gain from the AC simulation is small signal. The transient test is a large signal test and includes the cross over between the positve and negative side output stage. This adds extra delay inside the loop and this reduces the stability. The small signal stability is a first step and needed, but not sufficient to guarantee also stability / little overshoot in the large signal case.

In addition the stability may be different for the positive and negative side. So one should do the small signal tests with different DC current on top, to test at least both sides.

[mawyatt]

A simple test we've often utilized in both time domain simulations and actual physical hardware is based upon a Dirac Doublet Impulse which has zero average value, thus doesn't upset the DC bias conditions when "injected" into a system.

In simulations the doublet is created with a simple current PWL source with start at 0, then Ipeak, then -Ipeak, then 0. Select the amplitude and time spacing to ones system speed needs. This can be "injected" anywhere in the system to evaluate stability by means of evaluating the time domain impulse response.

For hardware use we originally developed this back in ~1970s and called it the "Pinger", where the doublet was created by a 555 timer, some high speed logic for a variable rate and impulse width spacing, then differentiated with a small series cap to a pot for level settings with a series R to the Pinger tip. We used the old aluminum Probe "cans" from Heathkit (recall) to house the "Pinger". Later we made some CMOS versions, worked really well and quickly allowed system stability tests & verification for different conditions.

Anyway, someday we may resurrect the "Pinger" if it hasn't already been done by others.

Best,

[wenyue]

Thanks for the information. I got the point.
But I tried to modify the step input. I still got overshoot around 16%. ><

[bateau020]

The overshoot is partially due to uncompensated use of the opamps. The input capacitance of especially the OPA140 is not to be neglected. Also, unfortunately, the djerickson's ltspice circuit is partially based on LT1057, that behaves a lot better than the OPA140. See attached images. I used the pspice models from TI for the OPA's.

Try this with 100k resistors (like the around the current measurement circuit of the DIY-SMU), and you will see it even better.

EDIT: added 100k example and compensation examples.

The compensation is to be done by adding caps in the feedback loop from out to -in, and from GND to +in. The value of the caps depend of course on the opamp and the resistors used. See 2 last images for that.