DIY PSU over current protection latches indefinetly

[OiD]

Hi all!

So I've nearly got my "new" work area ready for fun and it's about time to start finishing projects!!

I'm currently finishing a PSU that was a project for class many years ago and I have made plenty of improvements to it and works nicely considering it was just a quick project. Sadly the constraints of such project where to use a center tapped transformer and provide positive and negative outputs with using the center tap as the common.

I'm facing problems with the negative current limiting circuit (Q9, R23, Q8). While the positive side will reach a 3A limit and drop the output voltage to maintain 3A of constant current, the negative side will drop straigt to 0.7V and 2.6A on the output and stay there until the current is droped to aprox 2.4A.

From my point of view, Q9 is dominating the opamp's output after R19 and preventing the voltage regulation loop (as it's supposed) but latches with some histerisis...

Is there any obvious design flaw in the circuit? Please ignore the voltage reference area it is flawed in a couple of areas and is now provided with an external referance signal.

In short;
Output should be current limited to 3A and adjust the voltage to achieve this but actually the current limits to trigger at 3A, limits to 2.6A and cut's the output to 0.7V. The opamp output is at full swing.



I've tried using a potenciometer for R19, but even whith 0R the opamp still can't overpower Q9. If I place a resistor between Q9 and R19 then Q9 burns out as too much current flows thru the emitter. If I place a low value resistor between Q9's base or emitter to R23 and messes up the current limit quite a bit.

Any ideas for what might be going on?

Cheers!

[Andy Watson]

Two things spring to mind:
1. The input common mode range of the LM358 is between ground and Vcc - 1.5V. This is ok for the positive supply, however, U2A is being taken out of its operating range.
2. The output of the LM358 is asymmetric. It will source 40mA but only sink 20mA.
Edit: My second point is almost certainly a red-herring in this case. I think that you are seeing inversion due to U2A operating outside its common mode range.

[OiD]

Hi Andy,
Thanks for the quick reply and thougts.

I've added a few more details of the actual circuit, such as external -30V power supply for U2A and Q8, a voltage divider resistor for the negative input to the opamp and the opamp's input voltage range of 0V to 12V.

I've had a quick read here http://www.planetanalog.com/document.asp?doc_id=528175 and as you say, when the opamp's inputs a 0V it is out of range. Still, I'm looking at the opamp's output and it is as it should be at full swing to the negative -30 rail trying to get back to a closed loop so I don't think it's a case of inversion.

I'll have another look at it tomorow and see if I can make heads or toes of what's going on. Again, thanks.

[Dave]

Some comments about your design:
You don't have anything that controls the high frequency roll-off of the control loop. I have a strong feeling that this thing is prone to oscillation. Did you do a loop stability analysis? A small capacitor (single digit nF) between the output of the opamp's output and the inverting input might be everything you need to make it stable.

Remove Q4 and Q7 and connect the potentiometers directly across the LM385s. The two transistors serve no other purpose than to ruin the tempco of your voltage setting.

What purpose do U1B and U2B and the surrounding resistors serve in this circuit? I think they are just going to saturate and hit one of the supply rails depending on their input offset voltage.

Small capacitors (couple of uF) across the outputs would be a good idea to reduce the impedance of the outputs at higher frequencies.

[Andy Watson]

I've added a few more details of the actual circuit, such as external -30V power supply for U2A and Q8, a voltage divider resistor for the negative input to the opamp and the opamp's input voltage range of 0V to 12V.

There is still the problem of requiring U2A to operate outside of its common mode range. The upper limit of the common mode range is given as Vcc -1.5V (or Vcc-1.7V on the ON semi datasheet). The inputs that you have labelled as 0 to 12V are only specified to operate from -30 to -1.5V (relative to the ground on your circuit). To operate correctly, Vcc of U2A needs to be raised above 0V to +1.5V (but this will take the op-amp very close to its maximum supply voltage).

[OiD]

Some comments about your design:

Hi Dave,

I have not done any in depth loop stability checks as I've had no problems regulating the output between 0 and -18V with various load levels. I'll have a go at it when I have a moment
Regarding the the capacitor, I've had a few thoughts about it, but I've not seen any oscilation on the scope I've not bothered, will test it anyway and check for any different behaviour.
Q4 and Q7 and the shunt regulators (just seen that they are named LM385 witch is incorrect) have been replaced with a better circuit as it had a few flaws.

U1B and U2B are the second opamps as the LM358 is a dual opamp chip. The resistors are there to stop them from floating and oscilating.

The outputs now have some small nF caps and a large 2200uf. 2200uf is quite large but i'ts what I had on hand at the moment.

I've added a few more details of the actual circuit, such as external -30V power supply for U2A and Q8, a voltage divider resistor for the negative input to the opamp and the opamp's input voltage range of 0V to 12V.

Vcc of U2A needs to be raised above 0V to +1.5V

Hi Andy,

Yes, I can drop the opamps negative supply and power it with a resistor and a couple of diodes/zener from the positive supply for that. Even if I can regulate the output from 0V to 18V wit and withoud load do you still think it is the cause? I'll give it a try aswell

Thanks for your input!

[OiD]

Small update;

Added capacitor to opamp output to inverting input, smooths out a bit of noise from the potenciometer so thats a plus. No changes with the latching of the current limiting problem.
Also powered the opamp from +3V and -27V, still get the same behaviour.

I'm out of ideas... I need to somehow avoid the current limiting circuit from latching...

[Andy Watson]

Are you using the same op-amp as when you changed R19 to zero ohms? - If so, you may have damaged the output of the op-amp.

[OiD]

Are you using the same op-amp as when you changed R19 to zero ohms? - If so, you may have damaged the output of the op-amp.

Hi Andy,
I've tried two different LM358's and they both behave the same.

Here are some captures with;
CH1 Yellow - Opamp output
CH2 Green -  Vout of the power supply
CH3 Purple - Base of Q8
CH4 Red - Main negative power rail from bridge rectifier

The cleaner looking one is whith 3A just before the current limint circuit becomes active.


And the second one with the spikes is once the curren limiting circuit is active


The third is a close up of the spikes, about 700khz. No idea where this is coming from, might be the active load.

[Monadnock]

You could try reducing the gain by moving the collector of Q9 to the base of Q10 or even Q11.

[OiD]

Hi monandock, wouldn't that make Q8 dissipate lots of power? It's a small to-92 device with 30v across it. Ill give it a go tomorrow.

[Andy Watson]

Check out Dave's comments above with regard to stability and reducing the loop gain at high frequency. This might be a good time to build a spice model and play around with the loop gain. As you add real (capacitive) loads on to the outputs I suspect you will find that both positive and negative supplies will become more unstable.

[Monadnock]

Hi monandock, wouldn't that make Q8 dissipate lots of power? It's a small to-92 device with 30v across it. Ill give it a go tomorrow.

Not any more than it would with Q9 connected to its base.

The collector of Q8 is still connected to the collectors of the other transistors. The base current out of Q8 is limited by R19.

I don't even think you need Q8, you should have plenty of current gain during normal operation between Q10 and Q11,12.

[OiD]

Check out Dave's comments above with regard to stability and reducing the loop gain at high frequency. This might be a good time to build a spice model and play around with the loop gain. As you add real (capacitive) loads on to the outputs I suspect you will find that both positive and negative supplies will become more unstable.

Hi Andy, I understood Dave's comment as a method to improve high frequency response by making it quicker to react to changes and avoiding potential oscilations.
When you refer to the power rails do you mean the unregulated bulk capacitor rails?

Not any more than it would with Q9 connected to its base.

The collector of Q8 is still connected to the collectors of the other transistors. The base current out of Q8 is limited by R19.

I don't even think you need Q8, you should have plenty of current gain during normal operation between Q10 and Q11,12.

Yeah, there is plenty of gain, worst case is a gain of 20*85*100=170000... 1700 without Q9 and true, the current is limited by R19. I should've not answered while falling asleep 


I've also thought of placing a diode acros in paralel to Q9's collector/base to see if I can prevent it from saturating completly.

Thanks

[Dave]

Check out Dave's comments above with regard to stability and reducing the loop gain at high frequency. This might be a good time to build a spice model and play around with the loop gain. As you add real (capacitive) loads on to the outputs I suspect you will find that both positive and negative supplies will become more unstable.

Hi Andy, I understood Dave's comment as a method to improve high frequency response by making it quicker to react to changes and avoiding potential oscilations.
When you refer to the power rails do you mean the unregulated bulk capacitor rails?

No, that isn't what I said.

You need to reduce the gain of the control loop at higher frequencies, that's how you avoid oscillation. By adding a capacitor between your opamp's output and inverting input, you are actually adding a pole which will reduce the gain of the control loop at higher frequencies, therefore you ensure that the gain of the control loop well below 0dB at the frequency where the phase of the loop reaches 180°. This is how you prevent your power supply from oscillating with unpleasant loads like large capactances or inductances.

You then put a capacitor like an aluminium electrolytic across the output (something like 47uF) to keep the voltage stable when large transients come. You need a capacitor that is fairly lossy (hence al. electrolytic) because otherwise the control loop might not exactly like it.

[OiD]

No, that isn't what I said.

As I said, the way I understood it whas the opposite. Looking at it again I realized what you meant 

Here is the latest update;

Removing Q8 improved the oscilations and mostly avoided the latching problem.
Adding a capacitor from the opamp to the inverting input helped with the high frequency oscilations.
Adding a diode from the base of Q9 to the collector of Q9 helped avoid the latching problem.

The current limit cutof is not so quick now and I'm worried about thermar runaway. I'll put it in a box and see if the airflow of the temperature controled fan will improve. The two main transistors are dissipating 85W of power with a heatsink temperature of 65ºC

Thanks a lot for all the help    if it doesn't burn up I'll give it some extra stress tests and provably give it a nice case and a home.

Not great, but much better.


I'll also add a couple of photos of the mess it has become with all it's little changes and extra circuits...