Specialized PMIC requirement, anyone knows an option?

[juanfermed]

Hi everyone,

I hope you are doing great. I am looking in the market (google search  ) for a PMIC with some probably very specialized functions. We are looking for a single IC solution, but probably a combination of 2 ICs is also workable. Following are the requirements:

1) Solar Panel Input: 18V, 1 - 2A, with MPPT or MPPC (MPPC is what manufacturers refer to "Maximum Power Point Control" which is only setting the voltage of the panel near the MPP)
2) Lithium Ion Battery Management: single cell or muticell, we need it to manage charging, gauging, protection and battery balancing.
         Charging: Current in the 1 - 2A range
         Gauging: We need to know SoC only, features like SoH, capacity remaining, runtime, are not totally necessary.
         Protection: overvoltage, undervoltage, overcurrent, temperature
         Balancing: It depends on the multicell configuration, but it is necessary to keep battery safety.
3) DC-DC Converters:
         5V, 3A rail
         12V, 4 -5A rail
4) Host communications: the PMIC should be able to communicate with a host processor (really and MCU) to get/set parameters (for example, get SoC, protection warnings, charging state, set MPPT voltage, turn on/off DC-DC converters).

Following is an example of the kind of device we need http://dl.linux-sunxi.org/AXP/AXP223-en.pdf. This has almost everything, with exception of Solar Panel input, and appropriate DC-DC Voltages.

I will appreciate your input, or if anyone has worked on something similar. Our aim is to reduce costs and development time, we know there are single chip solution for each function but, its gonna be more expensive and time consuming.

Thank you guys!
 

[uncle_bob]

Hi

About the only thing missing is volume. If this is a 10,000 a day sort of thing, there are a lot of ways to go.

Bob

[juanfermed]

Hi

About the only thing missing is volume. If this is a 10,000 a day sort of thing, there are a lot of ways to go.

Bob

I guess we are not even near 10k/day, is 200/day reasonable? 

Contact Triad and Micrel, they have configurable power ASIC service that meets your demand, at a little NRE.
For your own semi customize power ASIC, $2.5k NRE sounds cheap (if my memory serves me correctly, that's the public price from Micrel years ago).

Wow, that sounds appealing. I will try to contact them. In the beginning we did not even think about an ASIC, although it seems that is what we are looking for. I guess we cannot go to superhigh (>$100k) development cost nor afford it.

[uncle_bob]

Hi

About the only thing missing is volume. If this is a 10,000 a day sort of thing, there are a lot of ways to go.

Bob

I guess we are not even near 10k/day, is 200/day reasonable? 

Contact Triad and Micrel, they have configurable power ASIC service that meets your demand, at a little NRE.
For your own semi customize power ASIC, $2.5k NRE sounds cheap (if my memory serves me correctly, that's the public price from Micrel years ago).

Wow, that sounds appealing. I will try to contact them. In the beginning we did not even think about an ASIC, although it seems that is what we are looking for. I guess we cannot go to superhigh (>$100k) development cost nor afford it.

Hi

Ok, so this puts you pretty solidly into the "semi custom" area. Rather than doing a full up chip from scratch, it is reasonable for you to talk to the usual suppliers about a modification of a chip they already have. A very common "deal" is a firm commitment to buy some number of years usage from them. That gets the up front costs into a range you can manage. Exactly what the costs and deals are depends *very* much on just how hungry they are this week.

Bob

[uncle_bob]

Another option is full customized ASIC, which you can get prototypes from MOSIS or EuroPractice at very low cost (for PMIC processes, from $2000 to $4000 per run).
The upside is obvious, you can integrate more on one die, so to cut cost, and as well as getting cheaper cost per chip since the chip bears no others' intellectual property.
Also, the down side is also quite obvious, that you need to hire highly educated chip designers at at least $10k per month. Even for an entry level IC, you will need 2 IC engineers working for at least 2 months, that's assuming you get it right the first time.

Hi

Ok, so they invest $4K in a run (plus another $40K) and have a half dozen samples of a semi-working chip. In all likely hood they will go through several more passes to get to something useful. Let's guess that is around $150K. Now they need to tool a mask set to get it fabricated. Best guess that is well over $250K and could be 10X that depending on the process.

That cost amortizes over the 200 x 5 x 52 = 52,000 chips they use a year. Simply for development, they are now paying > $10 a chip. Within 4 years, they will have to re-tool the mask set at a similar cost.

They also now are in the testing and packaging business (at least sub-contracting it) as well as managing a rather long supply chain. Since this may (or may not) dissipate a bit of power, the packaging could be "interesting".

For a pure digital part, yes, you would get away with a bit less. This is a power / analog part. It's not going to be a one shot design.

Bob

[uncle_bob]

Ok, so they invest $4K in a run (plus another $40K) and have a half dozen samples of a semi-working chip. In all likely hood they will go through several more passes to get to something useful. Let's guess that is around $150K. Now they need to tool a mask set to get it fabricated. Best guess that is well over $250K and could be 10X that depending on the process.

That's depending on who you are talking with. If you can sponsor a university group ($50k here in NC State per student, including everything), then they can get a working chip (several iterations) within a year.
Keep in mind that hiring a commercial engineer costs $120k per year at least, while hiring a PhD RA costs $50k per year, as long as you are willing to have your IP partially published on IEEE.
Also, in addition to MPW, there are fabs providing MLW for small volume mass production at a couple of k$. Finally, $4k is really the highest price for a common PMIC process. Usually $2.5k~$3k will be enough.

PS. $250k is enough for a full set of 90nm SOI process -- and nobody will make PMIC out of 90nm process. 350nm HV BiCMOS or 500nm even 700nm are more realistic.

Hi

Well, last mask set I ran was nowhere near 90 nm and the full cost was *well* above $250K....

I've been down the university route on about 8 occasions. Each time the full money was indeed spent. Generally the one year turned into two or three. In no case did we ever get a usable / commercially viable part out of the effort. We always did get sponsorship credit (in a footnote) for the project when all of the results of our "research" were published to the world.

Bob

[uncle_bob]

Well, last mask set I ran was nowhere near 90 nm and the full cost was *well* above $250K....

My fault. I remembered the wrong number.

I've been down the university route on about 8 occasions. Each time the full money was indeed spent. Generally the one year turned into two or three. In no case did we ever get a usable / commercially viable part out of the effort.

That depends on the groups. For instance, some groups (like ours) prefer more research than engineering, hence we do not take commercial development tasks. Some other groups do commercial engineering tasks with focusing solely on the completeness and profitability.

Hi

We most certainly have not run all the projects through the same organization. They have been run a wide variety of ways and through universities on at least three continents. The design requirements have not been exotic, but the products have been for unique applications. I suspect that if we had put another $200 to 500K into any of them, they would have made it out of the university. The bottom line has been that it is *much* cheaper to do it in house with our own design team.

At least as large an issue has been the fact that we would like to keep our chips for our use. Investing in a chip design and giving it away to the whole world is not a viable business plan in our view. This is generally at odds with a university viewpoint. That also limited our willingness to go into a "many $100K" extended venture.

Bob

[juanfermed]

Another option is full customized ASIC, which you can get prototypes from MOSIS or EuroPractice at very low cost (for PMIC processes, from $2000 to $4000 per run).
The upside is obvious, you can integrate more on one die, so to cut cost, and as well as getting cheaper cost per chip since the chip bears no others' intellectual property.
Also, the down side is also quite obvious, that you need to hire highly educated chip designers at at least $10k per month. Even for an entry level IC, you will need 2 IC engineers working for at least 2 months, that's assuming you get it right the first time.

Hi

Ok, so they invest $4K in a run (plus another $40K) and have a half dozen samples of a semi-working chip. In all likely hood they will go through several more passes to get to something useful. Let's guess that is around $150K. Now they need to tool a mask set to get it fabricated. Best guess that is well over $250K and could be 10X that depending on the process.

That cost amortizes over the 200 x 5 x 52 = 52,000 chips they use a year. Simply for development, they are now paying > $10 a chip. Within 4 years, they will have to re-tool the mask set at a similar cost.

They also now are in the testing and packaging business (at least sub-contracting it) as well as managing a rather long supply chain. Since this may (or may not) dissipate a bit of power, the packaging could be "interesting".

For a pure digital part, yes, you would get away with a bit less. This is a power / analog part. It's not going to be a one shot design.

Bob

Wow, this totally opened my eye to the sort of project this would be or should be. In reality we have never been involved in such a project, nor have internally the skills to do it. I think at the point we are right now, it is better for us to drop the idea of an all-integrated PMIC and go for a drop-in IC solution for each requirement. The downside being of course that we might not cut down costs.

That being said I think it would be super awesome to be involved in such a project, but myself having really zero idea on IC  would become only a witness of magic done by IC designers. It is very interesting to see the different paths that in reality are taken (internal development, universities, research) and how you have made numbers around it. I have been looking in the market and the best fit are those PMICs for portable devices (USB input + battery management + a lot of DC DC Converter in a single chip)...which still is not the best fit for our requirements (if we are strict to them).

One thing I will keep looking at is the semicustom IC which might the nearest we can get right now to having our own ASIC.

Thank you both for your input. I will be posting any progress I can make on this (and that I am allowed to share ).

[uncle_bob]

.....I will be posting any progress I can make on this (and that I am allowed to share ).

Hi

Yes, that is *always* the limit isn't it

Good Luck!

Bob