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Do old 74-series logic NOT have Schmitt-Trigger inputs?
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SiliconWizard:

--- Quote from: tggzzz on November 28, 2018, 06:35:52 pm ---The frequency is, of course, of little importance. What matters is the rise/fall time.

--- End quote ---

The "frequency" of the digital signal (as in the inverse of the period), obviously not. But rising and falling edges are of course just high-frequency components in disguise, so depends on what you mean by frequency. From an analog standpoint, digital signals with fast rising and falling edges are high-frequency signals, as you pointed out.

Granted the fact it's supposed to be a 1 kHz oscillator doesn't in itself matter much here (which is the part you may have misinterpreted) compared to the rise and fall times using even a 74HC14, although this kind of RC oscillator obviously severly limits the rise and fall time of the input signal of the first inverter, and also of the output (in a much less severe way of course) due to the RC loading the output (even slightly). The next chained inverters would admittedly not suffer from this.
So in this particular case, I still think the fact it's on a breadboard doesn't explain the issue he described, except maybe the lack of bypass (which could cause even more problems on a breadboard due to the inductive nature of the wiring) but again we haven't seen the setup and we may see something more obvious than suspected if we did.

But yes, for any fast circuits those breadboards should be avoided at all costs. (I don't consider the 74HC series as "fast" ICs and have never had any particular issue with those back when I was using solderless breadboards.)

The fact the IC could have been partially fried is not completely weird IMO (even if it's uncommon) as the apparently "fried" gates were not at random but all located on the same side of the IC (pins 1-6 if I got it right), so the chip may have suffered from some ESD on this side due to the way it was stored? The OP could try and test those gates with DC signals at the inputs and a load at the output, just to see if they appear to be dead or not. That could add to the learning lesson.
spec:
Some interesting discussions on this thread. :)

Can I just say that the integrating multivibrator, which the OP is using, is one of the most reliable and well behaved multivibrators going. It is ubiquitous. It uses the same principal as many successful  timers, including the 555. Unlike differentiating multivibrators, which can get into a third state (both transistors conducting), like the classic two-transistor collector/base coupled multivibrator, the integrating multivibrator does not have this problem. Also, in contrast to the differentiating multivibrator, it has no chance of exceeding the voltage rating of its active elements.

The frequency of oscillation is controlled by the time of charging the capacitor up to and down, via the feedback resistor, to the input Schmidt high and low threshold voltages respectively- nothing to do with fast edges. If you put a scope on the input you will see an approximately symmetrical saw tooth waveform. The formula for the frequency, and associated k factor graph, is given on page twelve of this datasheet: https://assets.nexperia.com/documents/data-sheet/74HC_HCT14.pdf

A 100nF X7R ceramic capacitor needs to be connected directly across the supply pins of the 74HC14 chip to prevent it from oscillating.

An aluminum electrolytic timing capacitor is not advisable.  A tantalum electrolytic or solid capacitor is far better.  A polypropylene capacitor would be the Rolls Royce choice.

About the failure mode of the OP's 74HC14 chip, I hate to say this, but far from being uncommon, it is very common. I think the reason is that the individual gates rely on common circuitry for bias etc. The gates are also fabricated on a common substrate. Therefor, when one gate fails it takes some of the others with it. I have seen this many times and not just with the 74HC14. The other thing is that the 74HC14 was often used to interface to a bus or other difficult load, which gave them a hard time. Another cause of multiple gate failure is uncontrolled parasitic oscillation, where the chip overheats and destroys itself due to the high frequency. This can happen when the inputs and outputs are left floating.
SiliconWizard:
As a quick sample simulation showing the effect of parasitics series inductance on power supply lines and bypass capacitors, attached is an LTSpice file.
Obviously this is a simplified model but this shows the principles.

For instance, remove the bypass cap C2 and see what happens to the oscillator.
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