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| ali_asadzadeh:
Hi, I want to implement two 1G Ethernet on my Spartan 6 part, and use it to send TCP//UDP data to a remote PC. I want to know if you know some easy to use IP/cores or external chips like W5300 (this one is 100Mb) I need a 1G solution. Since My time is limited on this project and I have limited resources , like money and time. any Ideas are highly appreciated! |
| MagicSmoker:
There's nothing easy about gigabit ethernet. What chips have you considered? What interface do you plan on implementing in the FPGA (PCIe, GMII, etc?)? Do you need a MAC and PHY or just a PHY? |
| ejeffrey:
Please put actual information about your question in the topic. Last I checked there were no "TCP stack on a chip" implementations that operated at 1G. So you will need a standard ethernet PHY connected over either (R)GMII or SGMII. Implementing a simple datagram packet handler on an FPGA is fairly simple, although be prepared to spend a lot of time reading documentation. TCP connectivity is much more complex and a much better fit for a microprocessor. That could be a microblaze processor, but I don't know what the performance will be like since you are making gigabit a requirement. Sustaining gigabit throughput TCP on links of moderate latency also requires a lot of RAM, so you will probably need DRAM as well the onboard SRAM will not be enough. For instance, 1 gigabit/s at 20 ms round trip time is a bandwidth-delay product of 2.5 megabytes. Your TCP sender needs at least that much buffer memory to avoid stalling, more to account for high latency bursts or packet loss. Honestly I don't think this is a good project for someone who is saying you have limited money _and_ time. The fastest approach would be to use an off the shelf dev board with an SoC FPGA and just let the ARM processor talk networking, but AFAIK the intersection of "cheap" FPGA dev boards and those with _dual_ ethernet is null. |
| rstofer:
The Zynq 7000 has dual gigabit Ethernet capability but the boards bring out just one interface. I don't know how to get at the second interface nor do I have any idea how to use Zynq boards https://store.digilentinc.com/fpga-programmable-logic/by-technology/zynq/ The only mention of dual Ethernet that I have found is in the free "The Zynq Book" (follow the yellow brick road for a free download) and it doesn't say much about it other than it exists as a peripheral. I believe both peripherals are tied to the ARM, not the FPGA but I don't know that. You probably need to read the concise 1843 page Technical Reference Manual: https://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf Both interfaces are discussed. |
| ali_asadzadeh:
Thanks for the Hints, I need to capture 110 channel of ADC and send it to PC using 1 or 2 Gigabit Ethernet, I should Pump at least 960Mbs to the PC, also I think I would use RGMII for the PHY, is it doable with a single Gigabit Ethernet? if not I should use two channels. I was seeking a free or open source and easy to sue IP core for the MAC, Also I prefer to sue Spartan 6 (XC6SLX150-3FGG484I) since I have them already and I do not need to buy new chips, But I'm open to use ZYNQ or other parts if the solution is easier and cheaper. At the PC I should capture the data and visualize it with QT. so any thing on the PC side would be helpful too. |
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