Author Topic: Double SDRAM ICs for STM32 - Routing Topology  (Read 623 times)

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Offline TrickyNekroTopic starter

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Double SDRAM ICs for STM32 - Routing Topology
« on: November 22, 2023, 11:48:39 am »
Hi!

Just a quick question. Would you route multiple SDRAM as a double T or would you route it fly-by?

SDRAM is running at ~100MHz. Lines are terminated in series. At these frequencies the wave length is
around 3 meters, so the distance between the ICs can not possibly form an effective stub. And with
fly-by routing you are getting a mismatch of the CKE and NE lines plus a change of impedance when
the signal passes the first IC of the chain.

Though again, at these frequencies it should not matter, but I am asking for your experience for what
worked better for you. Classically from old mobo´s the ICs are routed as fly-by, but got to ask anyhow.

Thanks,
Lefteris
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Offline Alex Eisenhut

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Re: Double SDRAM ICs for STM32 - Routing Topology
« Reply #1 on: November 22, 2023, 03:25:16 pm »
For a 100MHz sine wave. But you need to look at rise time.
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Offline TrickyNekroTopic starter

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Re: Double SDRAM ICs for STM32 - Routing Topology
« Reply #2 on: November 22, 2023, 04:37:46 pm »
For a 100MHz sine wave. But you need to look at rise time.

OOohh... Oh that´s very clumpsy of me, you are very correct.

Usually I assume 9th harmonic to have enough power to show somewhere ( which for many is an overexaggeration and would rather
only check the 7th harmonic, but that´s another discussion for another day ), which is a wave of 33cm or 330mm of length
λ/4 would be 82,5mm and usually shorter lines than λ/10 do not really interact much. So any trace shorter than 33mm,
would pretty much not create much trouble.

Traces from IC to IC are about ~9.5mm so that would not create much trouble, I shall only try to keep total length
of the traces near under 33mm and I should be alright.

Thanks! Your comment was more eye opening than you think!
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