MOSFET magically conducts (simple SPICE simulation)

[zphaze]

Hi,

I simulated this circuit in MicroCap, a simple switch using a NMOS (NX138BK) and a PMOS.



I get those results :



Normally, I would expect VLOGIC to become 3.3V when VTRIG switches to 3.0V (0 -> 3V transition).
The PMOS being high impedance, it should be to ground until the VTRIG applies a voltage at the gate which should then close the NMOS and thus close the PMOS so that 3.3V can appear at VLOGIC.
Except it just doesn't happen. As soon as 3V3 starts (0 -> 3.3V), VLOGIC goes to 3.3V.

Could someone rationally explain what is happening?
And perhaps a solution?

I tried different PMOS, but in vain (greyed out ones).

I have attached the .cir file (MicroCap file). It is portable, thus the models are embedded in the file.

[AlfBaz]

The drain and source seem to be mixed up on the nmos. This should allow the body diode to conduct, essentially you have a froward biased diode between 3.3 and vlogic

[zphaze]

The drain and source seem to be mixed up on the nmos. This should allow the body diode to conduct, essentially you have a froward biased diode between 3.3 and vlogic

This doesn't look to be the case when checking in the component editor.

[AlfBaz]

Check again 3v3 connects to source via 0 ohm resistor drain goes to earth via 47k resistor

[xavier60]

It could be because of the effects of parasitic capacitance being simulated.

[HackedFridgeMagnet]

I think R38, R48, R47 needs a rethink. In reality it would depend on the nature and voltage of the Vtrig source. open collector, push pull etc.

The voltage on the n channel gate should go between 0 and Vtrig. and Vtrig needs to be higher than the Vgs threshold which it certainly is.

The p channel gate voltage is important but you haven't shown it. It is certainly not allowing the FET to turn off.
Hope that helps.