Author Topic: High Speed SD Layout  (Read 3945 times)

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Offline RerouterTopic starter

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High Speed SD Layout
« on: May 26, 2017, 10:42:35 am »
I'm currently a bit confused reading around on the SD card specifications,

To set the scene i am using SAM3X8E, and connecting to a microSD card slot, I plan to connect to it using the 4 bit SDIO peripheral at 48MHz.
On this micro they put SDAT0 all the way on the opposite side of the chip to the rest of them, meaning it ends up being a very long trace compared to the rest of the connections
It is a 4 layer PCB, with SDAT0 jumping to the other side for 3mm, both planes in this area are ground planes.

Now while this chip doesn't give any info on it, a few microchip datasheets imply SDAT[0-3] should be within 250 mils (37ps) of one another, and be at most 1500 mils (220ps) longer than the clock,
Others mention no real limitation but say the traces must match 50 ohm within a few %.
And then on the far end we have sd.png which is from the SD standard, which implies atleast to me that within 3ns is ok,

So which one do i trust, sd1.png is running slightly thinner traces with an impedance close to 65 ohms, but meets microchips requirements (they made note to run grounds between to reduce cross talk but i doubt its required), while sd2.png is 50 ohm +- 7% but no length matching.

in SD2.png, CLOCK is 13.6mm, COMMAND is 14.3mm, DAT0 is 34.5mm, DAT1 is 34.5mm, DAT2 is 21.2mm, DAT3 is 20.1mm.
in SD1.png, CLOCK is 13.6mm, COMMAND is 14.5mm, and all DAT's are 34.5mm exactly.
« Last Edit: May 26, 2017, 10:45:30 am by Rerouter »
 

Online amyk

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Re: High Speed SD Layout
« Reply #1 on: May 26, 2017, 11:37:52 am »
The data window will be shifted slightly; you'll have to do the timing calculations to figure out if it is acceptable (my guess is that it probably is) --- and the fact that one pin is on the other side, doesn't preclude the others having to travel slightly longer on the die itself.
 

Online T3sl4co1l

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Re: High Speed SD Layout
« Reply #2 on: May 26, 2017, 12:23:14 pm »
The timing diagram says you have at least +/- 3ns or about +/- 0.6m.   It's not going to care. ;)

If you have only one SD card, then source termination resistors should be used, very near the driving pin for that trace (if bidirectional, then one on each end).  The total resistance should match the PCB trace impedance.

Total resistance includes pin driver impedance, which is usually around 30 ohms for a CMOS logic pin, so for a 100 ohm PCB trace, 70 ohms is enough resistance.  47 ohm resistors are very commonly used.  It's not very critical unless the length is comparable to the rise time.

Tim
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