EEVblog Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: sonnytiger on April 04, 2013, 10:27:42 pm
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At the suggestion of another user i got a couple UC3843 samples from TI to drive the MOSFET controlling the current through the coil. The output voltage of the chip is only 5V, from what i ahve been reading this wont be enough to turn on the MOSFET enough, should I use the output to drive another transistor which then controls a higher voltage? or is 5V enough? Could someone also explain the operation of this chip a bit to be? I have read the datasheet but don't think I understand it completely.
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Could someone also explain the operation of this chip a bit to be? I have read the datasheet but don't think I understand it completely.
Yep. One of my favorite chips. Bit complex though. It's basically a toolkit of different parts for building a SMPS, so I'll explain them separately.
- 5V voltage reference. This is output on pin 8 (VREF), and is divided by two internally (2.5V) and connected to the op amp's noninverting (+) input. I usually throw a 100nF decoupling cap here for the hell of it, but I don't think the datasheet recommends this.
- Op amp. The inverting (-) input goes to pin 2 (Vfb), and the output goes to the current sense comparator.
- PWM oscillator. The timing is governed by a resistor from pin 8 (VREF) to pin 4 (Rt/Ct), and a capacitor from pin 4 to ground. The duty cycle is controlled (well, created, actually) by the current sense comparator.
- Current sense. The oscillator triggers from high to low when the current sense input hits a threshold - this threshold is the output of the op amp. It triggers back to high again on the timing determined by Rt and Ct.
- And the one that's a pain in the ass if you're not doing mains->DC converters: Turn-on threshold of 8.4V. It won't start operating until Vcc hits this, even though once it's going, it will keep going less than that. This is used in offline (mains-DC) converters to give a startup capacitor time to charge, and then it uses the stored charge to get the real DC-DC converter running.
A little experiment to get you started figuring out how it works: See if you can run the oscillator output (pin 6) through a basic RC low pass filter and get 2.5V by running it back to the feedback (op amp inverting input, pin 2) pin. You'll have to figure out what to do with the current sense input, or else it won't oscillate correctly.
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The output voltage of the chip is only 5V
You're confused, the 5V output is the internal voltage reference. It has nothing to do with the MOSFET gate drive output - this will be whatever Vcc is, unless you got the SO-14 version, which lets you supply a separate voltage for that.
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One hint about "weird" (non-SMPS) applications: the output of that op amp is brought out to pin 1, called "compensation", but it's just the op amp output. You can abuse this. Voltage divider between here and the inverting input and you can get whatever voltage you want on the output, just determined by the reference voltage and the divider ratio. Then roughly "integrate" the PWM output with a weak RC filter, or more properly with an op amp integrator (a bit overkill for many applications but more linear), and feed this to the comparator. (You can also accomplish this with the waveform at Rt/Ct.) The output will flip every time the integrated output hits the threshold you set (minus two diode drops and then divided by three, as the datasheet shows).
Basically, ignore the datasheet text and look at the block diagram. Figure out what you can do with that.
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The output voltage of the chip is only 5V
You're confused, the 5V output is the internal voltage reference. It has nothing to do with the MOSFET gate drive output - this will be whatever Vcc is, unless you got the SO-14 version, which lets you supply a separate voltage for that.
Yeah I realized this just a second ago after looking at the datasheet again, will it really be what ever Vcc is? it specifies 12 or whatever at 15V Vcc I plan on running it at 24V unless I can't.
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It'll be Vcc less about one VBE drop - just look at the block diagram.
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Right yes I am looking at it now, and according to the block diagram, Vc is what is applied to the transistor and Power ground is the ground obviously, so the voltage applied to the transistor is whatever you want from what I understand. Unfortunately this is a problem as I have a 24V source which is too much for the MOSFET, is there a simple way of getting the voltage lower? I suppose a resistive divider would work with a resistor limiting the current into the Gate.
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looks like the Vc is a mistake, as pin 7 is Vcc, sorry.
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Grr, I need to think more before I post, Vc is for another package, again sorry.
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Okay finally a worthwhile question, under some characteristics, like the maximum duty cycle for the PWM it list under condition X842, what is this? I can't find any such marking on my chip and it is not mentioned elsewhere in the sheet.
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Unfortunately this is a problem as I have a 24V source which is too much for the MOSFET, is there a simple way of getting the voltage lower?
Ah, I didn't realize this. Zener diode? Ideally drop the voltage going into the 3843 so you don't have to worry about its response at higher frequencies.
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Okay finally a worthwhile question, under some characteristics, like the maximum duty cycle for the PWM it list under condition X842, what is this? I can't find any such marking on my chip and it is not mentioned elsewhere in the sheet.
That just means you have a UCx842, not UCx844 etc.
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Grr, I need to think more before I post, Vc is for another package, again sorry.
Easy mistake. I do dislike these datasheets that are really a crammed-together mega-datasheet for a family of similar parts.
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Man I am having trouble understanding this thing, I only have fun with electronics and this is my first taste of one of the controller chips. I basically want to use it to generate a square wave at a varying duty cycle, whatever is reasonable specifics aren't important, and I wan't to vary the frequency, which is important. Somewhere between maybe 50 to 250kHz. Could you explain to me how to do this and why/how it works? It would really help hearing someone who knows talk about it, I understand logic gates and how the little circle represents the compliment, but I am a little fuzzy about Opamps, which I assume is what an error amplifier is. Any help is appreciated at eh least, thanks!
Edit: okay i found a graph showing frequency versus resistance at different capacitance, seems like a 1nF capacitor and a pot would do nicely for varying the frequency, is thinking incorrect?
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Edit: okay i found a graph showing frequency versus resistance at different capacitance, seems like a 1nF capacitor and a pot would do nicely for varying the frequency, is thinking incorrect?
That's precisely what I'd do. Make sure to add some fixed series resistance to the pot - I don't know what's inside that "oscillator" black box, it might be unhappy with Rt being shorted to Vref by a zeroed pot.
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The basic idea of an op amp (oversimplified gratuitously) is that it tries to make both inputs equal by controlling the output. The + input is already 2.5V - if you wrap the output back to the other input, it will make the output 2.5V. If you divide the output by two and wrap that back around, the output will be 5V because 5/2 = 2.5.
The op amp is choosing some threshold. Just manipulate it this way to get a known value, it doesn't really matter what. The oscillator will flip when the current sense input equals this threshold (as I said before, minus 1.4V then divided by 3), so to change PWM, just vary the threshold, and feed a ramp generated by the oscillator into the current sense pin. You can use the ramp at Rt/Ct, but you might need to level shift it (a diode and resistor will do) to make it cross the threshold.
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right, there I know have a 100k pot in series with a 1 k resistor and a 1nF cap connected to the appropriate pins. Now I have to try and decipher what is next.
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Try getting it oscillating, to start. Look at the "Open-Loop Laboratory Fixture" in the datasheet.
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The basic idea of an op amp (oversimplified gratuitously) is that it tries to make both inputs equal by controlling the output. The + input is already 2.5V - if you wrap the output back to the other input, it will make the output 2.5V. If you divide the output by two and wrap that back around, the output will be 5V because 5/2 = 2.5.
The op amp is choosing some threshold. Just manipulate it this way to get a known value, it doesn't really matter what. The oscillator will flip when the current sense input equals this threshold (as I said before, minus 1.4V then divided by 3), so to change PWM, just vary the threshold, and feed a ramp generated by the oscillator into the current sense pin. You can use the ramp at Rt/Ct, but you might need to level shift it (a diode and resistor will do) to make it cross the threshold.
A silicon diode in series with a resistor, not reverse biased?
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I have no idea. I don't know what exactly the waveform at Rt/Ct looks like, TBH, I don't remember from the last time I had to probe around there. You'll have to figure out how to get it in the neighborhood of the threshold.
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If I connect the COMP pin to the Vfb pin, the error amp should output 2.5V continuously. looking at the block diagram, the zener seems to clamp the inverting input to 1V, -1V since its inverted. I am probing around now and see that pin 4 (Rt/Ct) has a ramp on it that goes up to 2.72V and never below almost exactly 1V. Studying the block diagram further, I can see that in order to turn the upper transistor on to make the output HIGH I need to get the OR gate to output 0. This would be accomplished my resetting the PWM latch, and by extension, making the current sense comparator output HIGH. Which would be accomplished by applying a signal to the Current Sense pin that I can't figure out. How am I so far?
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If I connect the COMP pin to the Vfb pin, the error amp should output 2.5V continuously. looking at the block diagram, the zener seems to clamp the inverting input to 1V, -1V since its inverted.
There's no -1V in that chip, so you're not getting negative anything. Look more closely at the pattern, anyway. First the output of the op amp (2.5V) goes through two diodes, giving a total drop of about 1.4V, so it's now 1.1V. Then it goes through a 2R/1R voltage divider, taking it down to 0.3667V. Then it's clamped to 1V, but it's already below that.
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Right I can see that now, so what level of signal would result in the comparator outputting HIGH? I tried learning a bit about comparators but a quick search described something too broad.
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I am probing around now and see that pin 4 (Rt/Ct) has a ramp on it that goes up to 2.72V and never below almost exactly 1V.
So you want to drop Rt/Ct by about one volt so it's in the neighborhood of the 0.3-0.4V threshold. Find a diode or combination of diodes that gives you a 1V drop (I might try one B-E junction of a transistor in series with a low drop Schottky diode), and then add a resistor to ground to keep the diodes always conducting.
Studying the block diagram further, I can see that in order to turn the upper transistor on to make the output HIGH I need to get the OR gate to output 0. This would be accomplished my resetting the PWM latch, and by extension, making the current sense comparator output HIGH. Which would be accomplished by applying a signal to the Current Sense pin that I can't figure out. How am I so far?
When the current sense pin exceeds the threshold, the latch resets. This is because when it's operating as a SMPS, it turns on the MOSFET, leaves it on until the current through the inductor reaches a set level, and then shuts off. The current sense pin would go to a small current sense resistor between the MOSFET and ground.
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Right I can see that now, so what level of signal would result in the comparator outputting HIGH? I tried learning a bit about comparators but a quick search described something too broad.
Not much to learn about comparators. They tell you which input is higher. If it's the + input, the output goes positive; if it's the - input, the output goes negative/ground. They're using a weird-ass symbol for the comparator, but it seems safe to say that the input with the "inverted" mark on it is the inverting (-) input.
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Okay, but if the pin is floating, isn't it at 0V? which would be higher than -0.3234234345345V? Or is floating "undefined"?
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Floating is definitely "undefined". A floating pin is at the mercy of whatever bias currents are applied to it and whatever EMI happens to be in its general area. That's why you never leave unused CMOS inputs (on logic gates, etc) floating, flapping in the EMI breeze.
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Hahaha nice gotcha, oh and one more thing it specifies that the maximum input voltage is 1V, If i take 2 base emitter junctions in series, measured as 1.3V, this would result in a peak of 1.4V or something like that, making the output turn on for some period of time then off. Is this an issue or should I just go for it and see what happens?
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Stick a resistor on it. IIRC it has a clamp diode in there (not shown on the datasheet) that will take a lot of current if unrestricted.
The "proper" answer is "never exceed the absolute maximums". The proper answer is that for hobby stuff, who gives a crap if you're not blowing the ass out of the chip? Voltage maximums can often be exceeded by just a little bit if you limit the current in case something is unhappy.
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Okay, well I did it with a 10k in series with the two transistors and on the scope i see very small ramp starting at like 1.5V going to 2V on pin 3. And I see no output at all. Just at ground level. Another thing is the ramp from Rt/Ct will always be more than the inverted input, so how would that work in the first place?
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Okay, well I did it with a 10k in series with the two transistors and on the scope i see very small ramp starting at like 1.5V going to 2V on pin 3. And I see no output at all. Just at ground level. Another thing is the ramp from Rt/Ct will always be more than the inverted input, so how would that work in the first place?
How exactly do you have this connected? The purpose of the diodes is to subtract their voltage drop from Rt/Ct so that it's not more than the threshold any more.
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I hat two transistor connected base to emitter with a 10k resister all in series going from the Rt/Ct pin to Current Sense, with the base connected to Rt/Ct. I just realized that the output should turn on when the latch is set rather than reset, but it doesn't am I missing something here? What is the block with the T in it and the triangle on the input?
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T latch (http://en.wikipedia.org/wiki/Flip-flop_(electronics)#T_flip-flop). (Latch, not flip-flop, so just ignore the clock input in the article.)
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Sigh, I am really having trouble under standing the Current sense input. If the comparator will output HIGH when the current sense input is higher than the other input, should it be higher at all times no matter what? even if i subtracted all the voltage away, it will still be higher. I don't understand at all. Grrrrrr