My first actions would be a signal integrity test: are all the voltages within the relevant logic level spec, are the setup/hold times observed, and are transitions clean. If not then that has to be sorted out first.
Beyond that you have to define what tests you think are worth doing, especially the difference between basic functionality and parametric tests.
What drivers were used in the PET? That should give you some clue.
For DC testing I'm sure 3/5mA would be fine, but what about full speed tests? To a first approximation, CV = Q = It where C is the input capacitance, V is the voltage swing in time t. So the current to charge the load capacitance would be I=CV/t. At a guess, C=5pF (per input), V=3V (for TTL), t=5ns, giving 3mA. So, the 3/5mA output drive isn't wrong, but is close. That might matter if you are doing tight parametric tests, but is unlikely to be an issue if you are allowing plenty of margin in setup and hold times.
What benefit do you expect from a current limiting resistor?
Do also check whether the jellybean logic chips are OK. I've seen a 7404 (?07?) become faulty and fail to drive an unobtanium high voltage driver.