Electronics > Projects, Designs, and Technical Stuff
Easiest way to collect some data @50MB/s and dump to computer
Kjelt:
Can you create an esata interface on your fpga? You could dump it to an ssd.
Or perhaps an 10Gb/s ethernet interface? I can do 600MB/s sustained to my NAS using fiber optical 10Gb/s ethernet.
NiHaoMike:
--- Quote from: Kjelt on June 14, 2020, 10:51:46 pm ---Can you create an esata interface on your fpga? You could dump it to an ssd.
Or perhaps an 10Gb/s ethernet interface? I can do 600MB/s sustained to my NAS using fiber optical 10Gb/s ethernet.
--- End quote ---
10G Ethernet is exotic and overkill. Plain 1G will easily do 100MB/s real world throughput.
Doctorandus_P:
Cypress CY7C68013 is FX2. Cypress also has a FX3 version which works with USB3 which will probably be plenty fast. A dusty cabinet in my memory suggests a price of EUR60 for a development board.
Another viable option may be to use one of the many small Linux single board computers.
Boards with 1Gbps Ethernet are less common then with 100Mbps, but there is still enough choice. I have no idea though much effort is required to push that kind of data through the I/O pins of such a board.
As you are already into the FPGA stuff, one of the cards from Mesa might be a viable path. For example: https://store.mesanet.com/index.php?route=product/product&product_id=55 These cards are popular for use with LinuxCNC.
SuperFungus:
--- Quote from: magic on June 14, 2020, 10:41:41 pm ---
--- Quote from: SuperFungus on June 14, 2020, 09:23:41 am ---If you are planning on using the FX2, I can recommend the fx2pipe software: https://www.triplespark.net/elec/periph/USB-FX2/software/fx2pipe.html
--- End quote ---
Any option to make it work with nothing external connected to the chip's bus, like those logic analyzers? I just want to test it, but no results so far...
It also doesn't work with libusb1 + libusb0.1-compat. That was resolved by installing genuine libusb0.1 (version 0.1.12).
--- Code: ---fx2pipe: wwusb.cc:129: WWUSBDevice::ErrorCode WWUSBDevice::_DoConnect(usb_device*): Assertion `dev_handle_to_dev(udh)==udev' failed.
--- End code ---
Maybe there are still some issues and it only pretends to work.
--- End quote ---
Well it's been a few years since I've used it, but I used this hardware with it: https://www.banggood.com/EZ-USB-FX2LP-CY7C68013A-USB-Core-Board-Development-Board-Logic-Analyzer-p-1183409.html?rmmds=search&cur_warehouse=CN I've also run it on custom hardware, and as far as I can remember the only hardware requirements were the clock and EEPROM (you may be able to get away without the EEPROM if you load into RAM over USB on every connection).
Are you on a Windows or Linux host computer? I used Linux, and don't recall having any problems building it and getting it to work so that could be another variable.
Edit: I just tried this myself and see the libusb issue. It looks like (for performance reasons) fx2pipe wants to queue multiple URB's, and needs a Linux file descriptor to do this since libusb0.1 would only send one at a time. Because libusb considers this file descriptor private data, fx2pipe had to get the file descriptor by kind of "breaking into" libusb's api and taking an offset into an opaque data structure libusb provides. In later versions, this offset is no longer correct, which is why it doesn't work with newer versions of libusb.
It's a real shame, the software worked really well when I used it years ago. The transparent firmware upload made it super simple to set up, flexible, and fast. I sent an email to the author to get his thoughts on what it would take to fix. Some cursory research makes me think that libusb v1.0 or greater's async modes would allow the same URB queuing, but through the stable API.
magic:
Yes, I have resolved this problem by installing libusb0.1 and verifying that usb_device_handle has the same layout as encoded in wwusb.c, but it still didn't do anything :-//
--- Code: ---fx2pipe -I -ifclk=30 -8
Firmware config: 0x12 0x83 0xe0 0x0c 0x12
IO loop running...
Downloading firmware [builtin]...
Submitting max. 16 URBs to fill pipeline... 16 submitted
# got bored waiting and killed it
^Creap_rv=-1, errno=Interrupted system call
OOPS: ProcessEvents: ec=4
IO loop exited
Cancelled 16 pending URBs (npending=16), reaping... done reaping (16): npending=0
fx2pipe: 0 bytes in 3.358s (avg 0 kb/s)
--- End code ---
I ran it on a similar breakout board with just the chip, crystal and EEPROM. It should be functional because I used it with sigrok in the past.
I assume EEPROM content is irrelevant, because fx2pipe loads its own FW onto the chip on every run.
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