Author Topic: EEZ Bench Box 3 (BB3)  (Read 178464 times)

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Offline prasimixTopic starter

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EEZ Bench Box 3 (BB3)
« on: June 21, 2018, 03:27:24 pm »
EEZ BB3 crowdfunding campaign on Crowd Supply
Forum discussion about crowdfunding: https://www.eevblog.com/forum/crowd-funded-projects/eez-bench-box-3-sequel-to-eez-h24005/

User manuals on English and German are available online: https://www.envox.hr/eez/eez-bench-box-3/bb3-user-manual/1-introduction.html



I'm opening this new thread since it does not strictly belongs to existing two threads: one about what is called EEZ H24005 programmable power supply and another discussing DIB ("DIY instrumentation bus").

This one is about making EEZ H24005 a) even more modular and b) more “completed” design/project that does not include ready-made modules. That also does not imply that EEZ H24005 project is dead, and that people who built it or get it via crowdfunding campaign cannot count on further support.

Currently EEZ H24005 is modular in the sense that so-called Power modules are independent from digital control (Arduino Shield). Theoretically one can make another Power module with different capability and functionality as long as its dimension are within 165 x 74 mm and can use 26-pin connector for both power and control lines.
One possibility is to redesign that module in line with proposed DIB where PCB could be 145 mm tall and 170 mm wide (or even wider). That gives enough additional space to host a complete AC/DC power converter, what will be presented in future posts.

More “completed” design mean replacing of used ready-made modules with "home made" design. In case of the EEZ H24005 that means giving up from Arduino Due, AC/DC module (from Mean Well) used to deliver 48 V for Power Board and AC/DC module (from Vigortronix) for delivering 5/12 V for powering Arduino Shield and 12 V cooling fan.

Mentioned changes are not trivial at all (i.e. cannot be done in few days): replacing Arduino Due means migrating firmware to the new platform and replacing AC/DC parts include playing with mains voltage that require different discipline during development and testing to stay alive and also provide something that is robust enough to be safe and secure during operation under all (or at least imaginable but practically possible) conditions.
Just that two reasons are enough to keep topic separated from existing EEZ H24005 project since even if I succeed with it that don't necessarily means that many people will be interested to cope with different MCU and especially with circuit that works with mains voltage.
« Last Edit: June 08, 2021, 02:31:55 pm by prasimix »
 
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Offline prasimixTopic starter

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I was entertained with the idea to replace AC/DC power module or mains transformer with some “in-house” solution almost from the beginning of my programmable power supply adventure. But shortly after EEZ H24005 crowdfunding campaign fulfillment was completed I starts to think more seriously about it. The similar situation was with thinking about alternative for used Arduino Due. I'd like here first to address AC/DC power module since I spent much more time on it then to MCU alternative.

AC/DC power module that should replace existing Mean Well LRS-150-48 (48 V/155 W) is designed taking into account the following features:
  • Wide input AC voltage (e.g. 85-265 Vac) without using a 115/230 Vac switch (also called universal AC input, full-range input, etc.)
  • Widely adjustable output DC voltage 2-42 Vdc or more. Therefore it can replace not just Mean well's power AC/DC module but also pre-regulator stage of the Power board build around LTC3864.
  • Over-current/short-circuit protection
  • under-voltage and over-voltage protection
  • Min. 200 W of continuous power
  • Bias power supply with all needed fixed voltages for the existing Power board (replacing LTC3260 on the Power board for generating required negative voltages)
  • Active/Synchronous rectification for better power efficiency (e.g. lower thermal losses)
  • Compact design that both power and bias stage are within Mean Well’s module dimensions (i.e. 159 x 97 mm)
I've decided to give a try to the AC/DC converter topology that is possible unusual for such purposes but was recommended by the person who is a sort of “living legend” when comes to power analog electronics who is actively, massively and selflessly helping many DIYers (including me) on couple of regional (Serbian) forums. His name is Dragoljub Aleksijevic, known as Macola. Therefore presented AC/DC converter (that acts as power pre-regulator and bias power supply) is more or less my attempt to make alive what Macola in one moment suggested.
A couple of disclaimers/clarifications is needed here: first, he also suggested more advanced topologies that can serve as efficient power pre-regulator and has better EMI since there are not hard-switching, but since this was my first attempt to make power AC/DC converter I selected one that will be presented shortly.  As you will see there include a lots of interesting details and challenges. Secondly, I was already spent many months on it and I'll try to squeeze a whole adventure in a few posts. Therefore it's quite possible that I'll forget to mention many important details so feel free to ask any kind of questions and I'll try to answer it by myself or by asking Macola for assistance.

The topology is called current-fed dual inductor converter (CF-DIC), that evolved from single inductor converter (or SIC) presented for the first time in the article Filho, Barbi (1996), A comparison between two current-fed push-pull DC-DC converters-analysis, design and experimentation.

The following picture shows basic components for converter's topologies presented in above mentioned article:

SIC:



… and DIC:



A list of DIC benefits over SIC topology is also presented and I'll mention it here for getting a better picture:
  • Voltage across the switch is 50% lower, hence switching components stress is lower
  • Transformer require only one primary coil and peak volt-ampere is 50% lower
  • Input inductor current is 50% lower (a cheaper/smaller inductor can be used)
  • Smaller current ripple and rms current in the output capacitor
  • Slightly smaller switches rms current
  • Inductor switching frequency is 50% lower (hence smaller losses)
What Macola proposed is a little bit different and with having in mind from the start what controller IC could be used to serve that purpose:



It has buck stage at the input that can be used to change duty cycle when PP (push-pull) stage is working with fixed duty cycle. In a way PP stage serve as a “DC transformer” (mind quotation marks here) that isolate primary from secondary side of high-voltage buck. Both buck (synchronous) and PP driver stages can be found in TI's LM5041B PWM cascaded controller. It include push-pull outputs that can be used to drive PP stage directly but with fixed duty cycle that is set to 50%. Depends of chosen topology, i.e. voltage-fed or current-fed PUSH and PULL outputs can be generated with programmed dead-time or overlap-time.
Driver signals overlapping is of paramount importance since neither of DIC inductors should be disconnected at anytime. That will induce a huge voltage that will shortly destroy one of the switching elements (MOSFETs in our case).
PP switching frequency is derived from buck stage frequency that is twice as much higher and set with external resistor.

How it works

Using Macola's words the following steps is an overview of important facts during operation:

1. Vin is switched on (first half cycle). HI-BUCK MOSFET and one of the PP MOSFETs (e.g. PUSH) are turned on. DIC1 inductor between them is connected to the full voltage (almost Vin) and current in it is rising following the dI = U / L * dt

2. When PWM time is expired, HI-BUCK is turned off and DIC1 inductor is trying to keep its current (Iend) to flow in the same direction. That current flow is preserved thanks to LO-BUCK MOSFET that is turned on (when expire dead-time after HI-BUCK is turned off). The PUSH MOSFET is still conducting. At the DIC1 inductor ends we have almost short-circuit condition (i.e. the major voltage drop is caused only by Rds, on of LO-BUCK and PUSH MOSFETs). Following the same law of dI = U / L * dt current change will be minor since voltage is small (about 1 V) hence we can consider that current is constant (e.g. Iend is still unchanged).

3. Just prior then PUSH MOSFET is switched off, PULL MOSFET is switched on (as defined with overlap time) and connect its end of primary coil to the ground. Otherwise when PUSH MOSFET is turned off both primary coil's ends will be left unconnected and the voltage on both drains will go into infinity (with disastrous outcome for one or more components). PULL MOSFET also connect its inductor (DIC2) to the ground and new Buck cycle is starting that is now charging DIC2 inductor.

4. Short overlap time is expired and PUSH MOSFET is turned off and voltage on its drain reach primary coil's Vclamp value (since its other end is grounded). Other end of the primary coil, that is connected to the switched off PUSH MOSFET is now behave as an accumulator that is charging and has Vclamp potential. Current thru DIC1 has Iend value and is now flowing thru the primary coil.

5. DIC1 inductor potential is now Vin – Vclamp, because Buck hi-side period is active. Since it was previously shorted and preserve Iend current, that current is now decrease slowly since a small voltage difference exists between its ends.

6. HI-BUCK is turned off again, and its voltage drops to LO-BUCK voltage drop (e.g. -Vd). DIC1 inductor has now Vclamp - (-Vd). The voltage difference is now much higher and current thru DIC1 inductor is falling much faster supplying the primary coil. DIC2 inductor has a constant current and its captured by short-circuit caused by PULL MOSFET conduction state and waiting that PULL MOSFET be turned off that it can start to flow into primary coil that will be reversely polarized in that moment.

7. Prior then PULL MOSFET is switched off (during the overlap period) now the PUSH MOSFET is turned on and “catch” its side of the primary coil, PULL MOSFET is turned off and current is continue to flow in other end of the primary coil that is reversely polarized.

… and the whole cycle is repeated over and again.



CF-DIC with short overlap time can be interpret as two boost converters that works in counter-phase with duty cycle a slightly over 50% and which load behind rectifiers is Vclamp. That means that the almost same rule is applicable for DIC inductor's calculation, where their supply is the buck stage, and average voltage of it pulses can be used as a DC source.

Output Vclamp on the Cout is reflected/mirrored on the primary coil proportionally to the transformer transfer ratio (Np/Ns). For example if Vclamp (i.e. converter's output voltage) is set to 10 V with transformer ratio N = 2 we'll have 20 V on the primary coil ends despite the fact that DC bus voltage is 325 Vdc (rectified 230 Vac).

Vclamp that is reflected/mirrored on the primary side can be seen as a voltage source with certain internal resistance. Therefore primary coil behaves as voltage source what is result of such heavy capacitance load. That load is necessary since it directly define its Vclamp. That is quite opposite from voltage-fed converters.

Offline prasimixTopic starter

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CF-DIC schematics, part 1
« Reply #2 on: June 21, 2018, 07:36:53 pm »
Now, I'll present what is assembled and tested so far, but first a short list of features:
  • Wide AC input 85-265 Vac
  • Wide DC output: 3-52 V controlled by tracker circuit
  • Max. current 5 A continuously (i.e. max. power is 260 W)
  • Synchronous rectifier
  • Over-current protection (OCP) set to ~7.3 A
  • Output over-voltage protection (OVP) set to ~54 V
  • fsw, buck= ~68 kHz, fsw, pp= ~34 kHz
  • QR flyback as bias power supply

A complete circuit (without QR flyback) can be split into two main section. Lets start with Buck/PP stage with DIC power inductors and transformer:



As already stated LM5041B is used as main controller for this CF-DIC. It's PUSH-PULL outputs can deliver respectable 1.5 A peak and it's used to drive directly PP stage MOSFETs. Situation with buck portion is different. Its outputs HD, LD are TTL and require driver IC. Buck is working with high voltage (e.g. 325 Vdc) therefore a HV driver is also required. But, additionally to just HV driver, an isolated driver Si8233 from Silabs is used that improve separation of low-voltage/small signal and hi-voltage/high power grounds. As two power inductors Murata 60B684C are selected and finally one very interesting part (also suggested by Macola): a transformer that is winded using VAC core (T60006-L2025-W380) with Vitroperm 500 F core material. It allows us to work with lower switching frequency (~34 kHz) while flux density could go easily up to 0.5 T instead of 0.3 T suggested as upper max. (Bmax for most of the other core materials.
Thanks for it's high permeability give us primary coil with high inductance using fewer turns. Making such transformer wasn't a big deal. I made first one in less then a ten minutes in the following way: first I make a braid with multiple wires for primary coil and insert it into heat shrinking tube with very small diameter. That tube alone is certified for 600 V that in combination with existing wire insulation is more then enough in our case, since voltage on primary coils in worst case (the highest Vclamp of 52 V) shouldn't go over ~104 V. Such prepared primary "braid" is combined with braid for secondaries of the same length (that is valid for 2 : 1 : 1 ratio), secondaries braid is bend on half and I simply start with windings. The end result is looks like this:



Doesn't look professional, but so far didn't make any trouble nor audible noise under any circumstances (if control loop compensation is properly set :)).

FB pin is grounded as usual in situation when secondary side is isolated and COMP pin is used instead for setting output voltage by changing duty cycle of HV buck stage.
LM5041B is powered from +12 V provided by QR flyback that will be presented later. But A-side of Si8233 needs +5 V and instead of providing additional bias voltage or stepped-down +12 V, a REF output from LM5041B is used for that purpose!
An diode clamping circuit is added in the PP stage to return back to the DCbus elcos (C34, C35) a part of reactive energy that exists due to L(sub)lk, pri(/sub) (primary coil leakage inductance)  reducing the stress of the RC snubber over primary coil. Anyway, that energy cannot be transferred to the secondary side.
As one can see all MOSFETs are SiC (Silicon-Carbide) that is especially beneficial for HV buck side. Also diodes D13, D15, D18 and D19 are SiC, too. SiC diodes are suggested since they don't have undesirable recovery time nor recovery current. Therefore they put less stress on related circuits: D13 to AUX bias power supply, D18 and D19 to PUSH-PULL MOSFETs (Q5, Q6). D15 is added as a “support” for low-side buck MOSFET (Q3) or its body-diode. D16 which is ordinary Schottky is added for more balanced supply between hi-side and lo-side buck supply (VOA and VOB).

Offline jbb

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Hi Prasimix

I too have been wondering about a very similar topology (using a single buck inductor and H bridge for primary winding) for a similar application: wide range output.

There are three things I really like about this style: it only uses a single primary windin, is easy to protect against output short circuits, and should be able to provide a wide output voltage variation to efficiently supply the linear post regulator.  There are a couple of things which make me nervous: where the CT goes, and the transformer isolation.

Maybe I'm just chicken, but I'm worried about people making their own transformers.  This is because it's a safety part which has to stand off big surge and spike voltages of 2500 V or more.  I'm concerned that someone might nick the insulating sleeve, or not allow enough creepage distance from the ends, or have some trapped metal particle that gradually rubs through, or...   I suggest you plan to source a commercially built and Hi Pot tested transformer for this project.  It will provide a margin of safety for the less experienced builders, and probably reduce the risk of you getting in legal trouble ("Your Honour, I made sure that the safety critical part was tested.")  Also, the leakage inductance will be more consistent in a commercial product.

As it comes to the switching devices, I think your primary switches could be superjunction Si MOSFETs because they don't switch in pairs.  Also, maybe the buck stage could use one Si MOSFET and an SiC freewheel diode (with a little efficiency loss...)
 

Offline prasimixTopic starter

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Hi Prasimix

I too have been wondering about a very similar topology (using a single buck inductor and H bridge for primary winding) for a similar application: wide range output.

There are three things I really like about this style: it only uses a single primary windin, is easy to protect against output short circuits, and should be able to provide a wide output voltage variation to efficiently supply the linear post regulator. 

Yes, in fact this topology is inherently resilient against output short circuit.

There are a couple of things which make me nervous: where the CT goes,

That is not visible on the first sheet of schematics. I'll explain that in the next coming post.


... and the transformer isolation.

Maybe I'm just chicken, but I'm worried about people making their own transformers.  This is because it's a safety part which has to stand off big surge and spike voltages of 2500 V or more.  I'm concerned that someone might nick the insulating sleeve, or not allow enough creepage distance from the ends, or have some trapped metal particle that gradually rubs through, or...   I suggest you plan to source a commercially built and Hi Pot tested transformer for this project.  It will provide a margin of safety for the less experienced builders, and probably reduce the risk of you getting in legal trouble ("Your Honour, I made sure that the safety critical part was tested.")  Also, the leakage inductance will be more consistent in a commercial product.

I was instructed when both primary and secondary wires are insulated with heat-shrink tube that gives margin of 3 kV, or 1.5 kV when only secondary wire is insulated. My hand-made transformer shown above has insulation of primary side only. I presumed that can provide an equal strength to the former example.
As already described we have here a much favorable situation then in case of e.g. flyback where on primary coil we have Vin, dc + Vclamp * N that could easily goes over 450 Vdc.
But, please note that if anything is happen with this project in the future I'm not going to wind dozens (or hundreds) of transformer by myself :). Therefore I already contracted Polish company Feryster that send me yesterday picture of a prototype built in accordance with specification:



As it comes to the switching devices, I think your primary switches could be superjunction Si MOSFETs because they don't switch in pairs.  Also, maybe the buck stage could use one Si MOSFET and an SiC freewheel diode (with a little efficiency loss...)

I've used MOSFETs in my first prototype, IPA60R380P6XKSA1 for hi-side buck and push-pull MOSFETs and IPA60R120P7 for lo-side buck. Results was disappointing, but I suspect mainly due to badly routed PCB. That is one reason why isolated driver is used in current prototype. Maybe on the next PCB prototype I can try Si MOSFETs again but I think that one for hi-side buck  should remain SiC. Lo-side could be removed and leave just SiC diode.

As you can already see I'm not so concern about BOM cost for this converter. I'm more interested to get robust and flexible design that can be easily scaled in the future if required. Selected topology promise easy upsize to couple of kW of output powers, but also a even wider output voltage. In that sense I'm particularly interested to build in the next step a converter which output voltage can go up to 400 Vdc and e.g. 500 W that can be used while building another SMPS :). Additionally (if that happen at all), with different transformer I believe that is possible to make a converter with output of few kV that can be used as source for some ESD testing and HV experimentation.

Offline prasimixTopic starter

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Regarding MOSFET selection I think that is worth mentioning how buck output looks when output voltage is approaching minimum value. For example, if set voltage is 4 V (current is above 1 A) it looks like this:



Pulse (inverted) is just 320 ns long and this is for 120 Vac (170 Vdc) and for 230 Vac it has to be even shorter! With SiC MOSFET is works like a charm.

Offline prasimixTopic starter

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CF-DIC schematics, part 2
« Reply #6 on: June 22, 2018, 12:25:34 pm »
The second sheet of the schematics include secondary side with current sense transformer, synchronous rectification, control loop and tracker circuit:



Current sense transformer is dual primaries Murata 54100C (1:1:100 ratio) that is connected on the less noisy point on the secondary side. It's isolation strength is 1.2 kVrms. Current sensing transformer could be also deployed on the primary side, e.g. between PUSH-PULL MOSFETs drains but in that case we could experience higher drain's “capacitive noise” since they are not connected directly to the power GND. Another possibility is to put it before buck stage, when single transformer with single primary coil is sufficient. I didn't test that possibility.
With dual primaries and full rectification we can count with nice output that can be used for current limitation that is on LM5041B set to 500 mV. Value of termination resistor (RT) is set about 6.8 Ω (R52, R53 in parallel) that limit output current to about ~7.3 Apeak that give us enough margin for working max. of 5 A. R51, C55 makes RC low-pass filter on the CS input pin.

Synchronous rectification (SR) is accomplished with IR1168 and MOSFETs with very low Rds, on. Today there is a quite a lot MOSFETs that are advertised as suitable for SR. But in our case with such wide output voltage we have to take into account (and I forgot that a couple of times, with predictable results :() that its Vds, max has to be twice as high then output voltage (if transformer ratio N = 2). Such MOSFETs are still easier to find in TO-220 package then e.g. in DPAK. Also regardless of how small is Rds, on, for 5 A output you can still expect dissipation that goes over 1 W. That shouldn't be a problem since if enough free or forced air circulation can be insured. Usually SR MOSFETs has extended temperature range of 175 oC. Otherwise TO-220 could be more practical, but it has to be mounted with terminals as short as possible.
Above mentioned IPP147N12N3 has Vds, max of 120 V and Rds, on of 14.7 mΩ. Another great candidate that is more expensive but still reasonably priced is IRFB4115PBF that goes up to 150 V with Rds, on of 9.3 mΩ.
You can find in attachment spreadsheet for calculating IR1168 working params that I made following its application note.
Of course, if dissipation and overall efficiency is not an issue SR can be replaced with suitable diodes (e.g. I've tested STTH802 for 200 V/8 A).

Finally, we have to close a loop to have regulated output voltage. Control loop resides on the secondary side and its output has to be isolated from COMP input pin of the LM5041B. Toshiba TLP291-GB.SE-T that is more compact then usually used optocouplers and also has swapped C and E output pins! First and obvious part for closing a loop is TL431 and it was used at the beginning and is enough if fixed output is needed (in that case neither separate aux power supply is needed, just additional secondary coil for AUX +12 V power). But, primary purpose of this CF-DIC is power pre-regulator that should provide variable output. That calls for tracking circuit that will monitor post-regulator Vout and modulate control voltage for the LM5041B. Usually, a PNP tracker is suggested (such solution is used between EEZ H24005 pre-regulator and post-regulator), but I found two disadvantages of TL431 + PNP tracker solution. First, it's more challenging to set loop compensation that works when post-regulator is in CV and especially CC mode. Another one that can be disastrous without adding additional protection (i.e. output OVP) is that any interruption/disconnection between tracker input and post-regulator output could easily increase CF-DIC output voltage to destroy secondary stage (what was happened to me twice when IR1168 and one or both SR MOSFETs were destroyed).
Therefore I was looking for other solution. First I came to pretty nice, and until recently a completely unknown for me TL103W that is also used for control loops of SMPS, especially when constant current is needed (as in LED drivers). It is consists of two op-amps where first one has internal voltage reference of 2.5 V connected to non-inverted input. That first op-amp is replacing TL431 (that is not an ordinary op-amp) and output voltage applied to its inverting input via voltage divider (R63R69 + R73) set max. voltage on the CF-DIC output, and represent output OVP. The tracking functionality is accomplished by voltage divider's GND potential (i.e. lower end of R73). If R73 is connected to 0 V we'll have max. output voltage and it can be decreased by increasing R73 potential and for +2.5 V (that corresponds to voltage reference value), its output will fall to zero. Such tracking control I was found in an Electronic Design article. Possible disadvantage of such tracker is that it require dual rail supply but that is not an issue in my case since bias power supply already offer +5/-5 V for powering post-regulator control circuits. The reference voltage has to be inverted (IC8A) and control voltage has to be within voltage reference range (0 – 2.5 V) and for that buffered signal (IC8B) from post-regulator CV control loop is used. IC8 is TL072 since it's already used on post-regulator side for lower BOM count.
This tracker works really nice and track CV to CC mode changes including short-circuit condition with voltage difference set to about 3 V. Currently it have only one obstacle: it cannot push output down to zero (it's about 0.11 V). Therefore when post-regulator output is approaching 50 V it cannot provide more then 1.5 V difference. Perhaps I failed to arrange TL103W and TL072 op-amps: if TL072 is used in place of second TL103W op-amp it could be possible to go down to zero since it is powered with dual rail. Here is what I have with current setup (I intentionally spread last few volts to highlight non-linearity caused by TL103W inability to pull output down to 0 V):



That is all for now about "theory" of CF-DIC. I'll start to publish some measurements before I continue with bias power supply that is also part of this design.
« Last Edit: June 22, 2018, 12:44:15 pm by prasimix »
 

Offline jbb

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Current sense transformer is dual primaries Murata 54100C (1:1:100 ratio) that is connected on the less noisy point on the secondary side. It's isolation strength is 1.2 kVrms.

Hmm. The isolation rating on that CT seems a bit low.  I would happily put that somewhere int he primary side (e.g. in series with main MOSFET) but I suspect it only counts as functional isolation, and isn't sufficient for user safety.  It's more work, but I do wonder

Regarding MOSFET selection ... Pulse (inverted) is just 320 ns long and this is for 120 Vac (170 Vdc) and for 230 Vac it has to be even shorter! With SiC MOSFET is works like a charm.

That is quite short.  Maybe someone could look at a superjunction Si MOSFET as an optional cost-down.

I've used MOSFETs in my first prototype ... Results was disappointing, but I suspect mainly due to badly routed PCB. That is one reason why isolated driver is used in current prototype. Maybe on the next PCB prototype I can try Si MOSFETs again but I think that one for hi-side buck  should remain SiC. Lo-side could be removed and leave just SiC diode.

I do like isolated drivers for that - even if you allegedly don't need isolation they can really simplify design by breaking ground loops.
 
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Offline prasimixTopic starter

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Current sense transformer is dual primaries Murata 54100C (1:1:100 ratio) that is connected on the less noisy point on the secondary side. It's isolation strength is 1.2 kVrms.

Hmm. The isolation rating on that CT seems a bit low.  I would happily put that somewhere int he primary side (e.g. in series with main MOSFET) but I suspect it only counts as functional isolation, and isn't sufficient for user safety.  It's more work, but I do wonder

Ok, the user's safety is of paramount importance that we can agree easily (hence your concern). Please let me know what is the worst case scenario here that CT could become dangerous? It's from one side connected to Out+, and on the other to the CS input of LM5041B that is isolated from HV buck using Si8233 and use AUX voltage from bias power supply (still not presented) that is isolated flyback. LM5041B is directly connected only to PUSH-PULL MOSFETs gates. Therefore we should have a multiple breakdown from buck isolator to LM5041B to CT or from AUX power to LM5041B to CT or from PUSH-PULL MOSFETs to LM5041B to CT.

If we want CT on the primary side, then I'd like to put it before buck stage rather then to PUSH-PULL drains to GND. In that case we don't need dual primary CT.

Offline prasimixTopic starter

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Superjunction vs. SiC MOSFET prices
« Reply #9 on: June 25, 2018, 08:08:58 am »
I did a quick search for superjunction MOSFETs and price comparison based on Mouser offerings. The currently used SiC is the cheapest one but it is still 2.85 EUR. But most of the superjunction's from e.g. Vishay offerings easily goes over 3 EUR and their performance is still inferior to SiC. Let me know if you eventually find something that is worth testing (still I can bet on inferior performance with wide output voltage). The real issue with selected SiC (and most of the others from the same family/manufacturer) is possible supply shortage. I can easily imagine a huge demand for such kind of device.

It's obvious that this project is not BOM optimized, but that is not my intention. I'm not here in competition with other (more BOM friendly) topologies that is in the first place mostly built for the fixed output voltage.

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CF-DIC primary side measurements
« Reply #10 on: June 25, 2018, 12:42:01 pm »
In this post I'd like to present some measurements that were performed on the primary side of the CF-DIC and could be of interest for further discussion and to potential builders.

Input voltage was 120 Vac (using isolation transformer), and CF-DIC output is set to 20 V by tracking post-regulator output of 17 V since as you can seen in the following picture on this (second) prototype PCB (“DIB format”) I put together complete CF-DIC, bias power supply and post-regulator that is copied from EEZ H24005 project. Additionally a provisional AC filtering is added and DIB interface section (that has to be tested).



In this revision TL431 with PNP tracker was used and QR flyback is based on controller that I'm going to change in final release (but more about that later). Also I still have to decide between two options: to leave together pre-regulator and post-regulator on the same PCB or to separate them on two PCBs: one with pre-regulator for 2 channels and another with post-regulators for 2 channels!

A few words about how I started to test a whole thing that is well known to experienced builders but could be helpful for beginners like me.

First, a different discipline is highly required from the start. That means that you cannot simply start to play with such type of circuits when you are tired, or your attention is shared between e.g. nowadays uninterrupted “noise” flow from from PC or "smartphone" screen or with someone that just came into the room and want to chat about weather, sport results, home affair, etc. Single mistake and ... puff, you can count on various damages that could cost at least you time and money with presumption that you was lucky and wasn't injured! Some people are using Plexiglas shield that are usually advertised for conducting chemical experiments (perhaps something like
).

Secondly, I'd highly recommend that never, ever start with connecting the circuit to the mains voltage before you are completely sure that all parts works as predicted under load. I did it in few steps: at the beginning, with the first (non-SiC) prototype I was using EEZ H24005 set to its max. 80 V (that required to adjust ULVO voltage divider otherwise LM5041B will not start. You have to readjust it again when switch to the mains especially 230 Vac) and with foot pedal control for output control! Huh, that was a "life saver" few times :). Then I used next what I have on the bench as that is an old prototype of EEZ H24005 that goes a little bit higher up to 100 V. Of course in both cases a current limitation is used very conservatively/cautiously that resulted even in “soft-starting” of the HV bulk elco charging :). After that a 230/120Vac isolation transformer is used when working with 120 Vac is actually even more interesting since it put more stress on the input stage since required current is higher then with 230 Vac. Basically if everything seems to work fine with 80/100 Vdc power supply you can expect good results when connected to the AC input, first indirectly using isolation transformer and then directly.

Another important thing is scope, and I don't want to recommend such adventure without one. I'm using scope with ground connection isolated from the grid (since I don't have an differential probe). Don't ever try to think about using grounded one and touching anything on the primary side. Needless to say you cannot use same isolation transformer secondary to power both scope and CF-DIC. Use two separate transformers or one with dual and separated outputs.
Additional warning is needed for working with SiC MOSFETs: never, ever touch hi-side buck gate pin with your scope probe when circuit is powered on!
If you'd like to monitor signals on both primary and secondary side, take care about you GND connection. You'll broke in that manner ground separation (isolation) and when do that it's better to make it locally i.e. on the PCB then making a huge loop that goes over probe cable and ends up on the scope side.

On the picture below is shown how the latest working prototype PCB looks like from the bottom side. As one can expect there is a lots of modifications, one is already mentioned that is different control loop and tracker for what I made a small PCB instead of redoing a whole PCB once again. Instead of initially planned DPAK sync MOSFETs I'm using now more capable one (i.e. higher Vds, max) that are listed in schematics (IPP147N12N3GXKSA1). I've also added LC filter on the pre-regulator output and additional Cbulk (totaling 300 uF) for lower ripple when working with 120 Vac. 230 Vac works quite good with even single 150 uF, but in final version I'm going to use 2 x 120 uF.



Let's start with measurements of all LM5041B control signals: HD, LD, PUSH and PULL.
Iout=1 A and due to single GND connected to one end of Cbulk that are fare away from LM5041B signals looks a little bit “messy” but in reality they are way better with proper probe grounding.



With different timebase we can see e.g. that PUSH and PULL signals are overlapped.



Next measurement include buck output (DIC inductors input) and PP stage:



Without load primary coil ends (connected to PUSH and PULL MOSFETs) to ground:



… or better presentation when single probe is connected to the primary coil ends:



When Iout=1 A it looks like this (“top” voltage is 40 V for Vout=20 V):



DCbus ripple for 3.5 A looks like this:



… and current transformer output on its termination resistor (non-filtered) for the 3.5 A (it's a little bit below half of scale since Imax is set to ~7.3 A):



I don't have a current probe and cannot present any current measurement, neither thru DIC inductors, transformer or other parts of interest. Something that I'd like to have much more is thermal imaging. Phew, that could be something.

Please let me know if I forgot to mention some important measurement on the primary side, and I'll try to do it.

« Last Edit: June 25, 2018, 12:50:08 pm by prasimix »
 

Offline jbb

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I suggest you check the voltages around the buck FET during the switching transition. You need to look out for big spikes or ringing.

The catch is that SiC devices are fast. As you said, the gates are very sensitive. Small stray capacitances and inductance can cause big problems. So crank up your scope to maximum bandwidth and see what you can see. Then work out whether the rise time in the screen is the rise time of the circuit or the rise time of your scope + probe. I have blown up circuits before because there was an short & nasty spike that I didn’t have the bandwidth to see.

While I do most of my power e work with the 20 MHz bandwidth limiter on, there are times when you need a 500 MHz scope to see the truth.
 

Offline prasimixTopic starter

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I suggest you check the voltages around the buck FET during the switching transition. You need to look out for big spikes or ringing.

I'm not sure how to achieve this, just to put probe tip in the near proximity of gate pin? I can for sure pick up some switching noise. Or a whole exercise is to see if some glitches exists and are interpolated to hi-side control signal?

Offline prasimixTopic starter

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A few screenshots of buck output, measured between hi-side MOSFET drain and source, with 70 MHz BW and 1K on probe tip. Vin=120 Vac, Vout=51 V,  Iout=3 A:



... Rising edge:



and falling edge:



EDIT: And same output without load:

« Last Edit: June 26, 2018, 08:29:13 pm by prasimix »
 

Offline jbb

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Sorry, wrote some stuff just as you were posting.  Will address at lunchtime (gotta run to work).

Ok, the user's safety is of paramount importance that we can agree easily (hence your concern). Please let me know what is the worst case scenario here that CT could become dangerous? It's from one side connected to Out+, and on the other to the CS input of LM5041B that is isolated from HV buck using Si8233 and use AUX voltage from bias power supply (still not presented) that is isolated flyback. LM5041B is directly connected only to PUSH-PULL MOSFETs gates. Therefore we should have a multiple breakdown from buck isolator to LM5041B to CT or from AUX power to LM5041B to CT or from PUSH-PULL MOSFETs to LM5041B to CT.

If we want CT on the primary side, then I'd like to put it before buck stage rather then to PUSH-PULL drains to GND. In that case we don't need dual primary CT.

OK, the CT secondary is connected to main DC bus 0V by the LM5041.  This is connected to the incoming AC line via, I guess, a diode rectifier.  From a safety perspective, that counts as connected.  We therefore see that the weakest isolation between the DC output (which humans can touch) and the AC line is the CT.  If the AC line is subject to a big spike (e.g. a circuit breaker opens / closes under heavy fault 'nearby' in the power system), large transients can be generated (>1kV).  The CT probably isn't rated to reliably stop that, and if the insulation fails it will short mains potential into user-accessible terminals.

I see three approaches to resolving this:
  • Place CT on primary side somewhere.  This particular failure mode goes away.
  • Use CT with 'reinforced' isolation
  • Put LM5041 control chip on the isolated output side.  This will involve some messing about (e.g. how to power it, adding isolated gate drive to primary MOSFETs).  If you're using the DIB interface, there should be some DC power available to run the LM5041 for you, and maybe replace the QR flyback aux supply.  (Note: buck converter chips are available to generate a little bit of non isolated 12V from 100 - 400V DC to drive primary MOSFETs.)
 

Offline jbb

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OK, morning tea time, so let’s have a look at those waveforms.

Straight away, they look suspiciously clean. Maybe your layout’s excellent, or maybe something is hiding.

Rise and fall times are approx 38 ns from ‘scope measurements. Given rule of thumb of BW (GHz) = 0.35 / tr (ns), get 0.35/38 = 0.0092 GHz BW, I.e. approx 10 MHz, which is within ‘scope capabilities. I suggest cranking the timebase up so we get more details on the transient. It should ideally take approx half the screen.

I’m a little concerned about the 1k series resistance. The Rigol 10x probe could have up to 15 pF capacitance, which gives a time constant of 10 - 15 ns. This is approx 10 - 16 MHz BW.

These bandwidths match up, so I suspect that what you’ve actually measured is the 1k resistor and ‘scope probe capacitance.

Also, were you using the probe clip and alligator clip ground? These aren’t good for higher frequencies.

Could you send a picture of your probe setup? We may be able to do much better.
 

Offline prasimixTopic starter

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Ha, ha, now that looks funny for me. Yes, it's almost suspiciously clean that one can think that source is something else or that pictures are doctored/Photoshoped :). But it wasn't so funny with my first prototype, quite contrary. I believe that current result is combination of multiple factors: GND isolations (thanks to Si8233), better PCB layout and use of SiC MOSFETs.

1K in combination with probe makes a RC filter. I've repeated measurements from the last post this time just with x10 probe applied between drain and source as shown on the next picture:



"Zoomed out" buck output, no suspicious glitches are visible:



... rising edge:



... falling edge:



... and without load:



Offline prasimixTopic starter

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I see three approaches to resolving this:
  • Place CT on primary side somewhere.  This particular failure mode goes away.
  • Use CT with 'reinforced' isolation
  • Put LM5041 control chip on the isolated output side.  This will involve some messing about (e.g. how to power it, adding isolated gate drive to primary MOSFETs).  If you're using the DIB interface, there should be some DC power available to run the LM5041 for you, and maybe replace the QR flyback aux supply.  (Note: buck converter chips are available to generate a little bit of non isolated 12V from 100 - 400V DC to drive primary MOSFETs.)

I think that first suggestion is the most practical one. I didn't find better CT so far with better margin or reinforced isolation. Most of them have just functional isolation of 500 Vrms for mounting on the primary side. Making a custom one just make things even more complicated.
Moving LM5041B on the secondary side asks for two additional gate isolation transformer for driving PP stage. Powering Si8233 is not a big issue since bias flyback AUX output can be step-down to required 5 V.

I'll try to incorporate Murata 53100C on the existing PCB and see what will happen.

Offline jbb

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Ha, ha, now that looks funny for me. Yes, it's almost suspiciously clean that one can think that source is something else or that pictures are doctored/Photoshoped :). But it wasn't so funny with my first prototype, quite contrary. I believe that current result is combination of multiple factors: GND isolations (thanks to Si8233), better PCB layout and use of SiC MOSFETs.

1K in combination with probe makes a RC filter. I've repeated measurements from the last post this time just with x10 probe applied between drain and source as shown on the next picture:

That's more like it.  A 10ns fall time is approx. 35 MHz BW (and I think you said you had a 70 MHz 'scope?) so you're probably good.  We see a little bit of a spike, which is normal and expected.  I suggest you also measure the drain-source voltage on the other MOSFETs, with the following questions in mind: is the signal I'm measuring within the bandwidth of my equipment and am I seeing nasty spikes / oscillation?

We'll have to think up a method for measuring current flow - perhaps you could cut a track and solder in a low value shunt between the synchronous rectifier FET and the 0V point (without messing up the gate drive loop!)?

With rise and fall times around 10ns, you could go down to 100ns minimum pulse width (maybe even 50%), which may allow you to increase the frequency and reduce the size of passives in the supply.  Depends on switching losses.

(I once blew up a full set of 6 MOSFETs due to using a 50 MHz probe and not seeing a big 70 MHz oscillation.  They went with a bang and sprayed some chunks of epoxy around the place.)

The new CT you're thinking of is rated to 500V, but that means tested at 500V RMS for 1 second.  Insulation ages, so I would be a bit worried about that lasting for 10 - 20 years with 380V DC across the insulation.  You need to look at not just isolation voltage, but also operating voltage.
 

Offline prasimixTopic starter

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I suggest you also measure the drain-source voltage on the other MOSFETs, with the following questions in mind: is the signal I'm measuring within the bandwidth of my equipment and am I seeing nasty spikes / oscillation?

The following screenshots were taken on lo-side MOSFET. Yes, I'm still on 70 MHz Rigol. I have an old analog 100 MHz Tek, but taking screenshots is not so simple (I need to call someone to take it while I'm probing signal on the PCB).







... and without load:



I didn't manage to destroy any MOSFET (that can be an explosive event) so far in normal operation. But I had two incident (in the same day thanks to lack of discipline mentioned in one of previous posts!) when I've touched, actually shorted two pins directly on the LM5041B instead of probing on neighborhood parts :phew:. End results was failure of multiple parts (LM5041B, Si8233, SiC MOSFETs), but fortunately without explosion.

Offline prasimixTopic starter

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Tried yesterday 1:100 Murata 53100C on buck input with unsatisfactory results as I expected (at least in comparison with current solution). Output waveform looks like this:



... or "zoomed out":



Even if that is acceptable, it is not attractive solution for wide input voltage range. If I found current limit for 230 Vac range it will be too small for 115 Vac and vice-versa, proper threshold for 115 Vac will be way too high for 230 Vac.

I found yesterday Pulse Electronics P0582NL with 3 kVrms margin that is reportedly UL-C/UL recognized component, but it is too large for my current PCB. Therefore I have to rearrange/resize PCB layout. Other possibility is to reinforce current CT margin using opto-coupler circuit.



Offline prasimixTopic starter

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I'll try to do something with existing CT by enforcing its isolation by introducing an opto-coupler and TL431. That could be still cheaper and smaller solution and provide even higher margin than any off-the-shelf CT alone. This is a first simulation that can be used as starting point for real testing:





« Last Edit: June 30, 2018, 03:35:39 pm by prasimix »
 
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Offline jbb

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That seems like a lot of bits, and I think it’s the wrong approach.

Firstly, the LM5041 is a peak current mode controller (with slope compensation) and needs a high speed analog current measurement to work properly. Your circuit doesn’t provide that.

Secondly, that’s a lot of extra components. If one of them fails you loose all current control and things get very risky.

Have you considered putting a CT in series with the transformer primary? It should be voltage clamped by the secondary output voltage.

Alternatively, you could place a 0.1R (approx) current sense resistor in series with the return current from the push-pull FET source pins. This effectively measures the total inductor current for you. Losses would be quite small.

Also, the C3M280090D is in a big TO247 package which is good for cooling and bad for parasitic inductance. If you look at the C3M280090J, it’s in an SMT package with less leakage inductance and a Kelvin Source pin for improved gate drive. The switching losses are halved for the SMT version.
 

Offline prasimixTopic starter

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That seems like a lot of bits, and I think it’s the wrong approach.

Firstly, the LM5041 is a peak current mode controller (with slope compensation) and needs a high speed analog current measurement to work properly. Your circuit doesn’t provide that.

Secondly, that’s a lot of extra components. If one of them fails you loose all current control and things get very risky.

It's wrong approach rightly in a order as you said: this circuit doesn't provide correct (pulsed) signal that can be used for slope compensation, and require much more components that is not so bad if its sum is cheaper then CT on secondary side with reinforced insulation.

Have you considered putting a CT in series with the transformer primary? It should be voltage clamped by the secondary output voltage.

Alternatively, you could place a 0.1R (approx) current sense resistor in series with the return current from the push-pull FET source pins. This effectively measures the total inductor current for you. Losses would be quite small.

Neither of that looks promising to me, especially adding anything in series with the source pins. Maybe with ordinary MOSFETs but not with SiC. Therefore I'll proceed with testing what is possible to do with adding CT at the buck input as started in post #20. I believe that better results can be achieved.

Also, the C3M280090D is in a big TO247 package which is good for cooling and bad for parasitic inductance. If you look at the C3M280090J, it’s in an SMT package with less leakage inductance and a Kelvin Source pin for improved gate drive. The switching losses are halved for the SMT version.

I'm aware of SMT package but also that it has much higher Rds, on (385 instead of 280 mOhms). If THT pins are inserted as much as possible (as I have now) I think that Llk is acceptable (anyway oscillograms looks fine). Also organizing cooling of THT is a way simpler then SMT. With min. heatsink it can provide half of output current without need to start fan. With bigger heatsink (e.g. if enclosed in chassis that is used for cooling) I belive that no fan will be required at all.

Offline Giaime

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About CT insulation requirements: why don't you use a CT without a primary coil and use a suitably insulated wire (or wire + silicon sleeve) to reach the required insulation rating?

I know CT w/o primary are bigger, usually for larger currents etc... but you still can find something small enough I think.
As an alternative that I tried in the past, very good in terms of speed and accuracy, are open loop Hall effect sensors (LEM, Tamura...). They came also w/o primary and I managed to get my required 4kVdc insulation rating by using a wire + silicon sleeve.
 


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