My 74LSxx logic-based 8 bit computer project

[TheCrazyRichard]

I think I will rebuild the instruction set and the whole concept of the CPU... As you've said, C, it might be nice to do the registers and ALU the PDP way, so I'll change the registers to be all GPR. Then I will use separate ALU (or maybe even more than one? )... There won't be even a flag register itself - you'll have to call a function to put the real flag register contents to any of the GPR's probably... And I'll probably use separate memory in the computer to store the register tables and so on for multitasking and so on as I described before...

Really, thank you for your valuable help, C, you really appear to be a real pro in this field

[C]

Lets look at your idea a bit.

First lets forget about speed, get something working and there are ways to speed it up.
You mentioned a pic.

You could write a program for the pic to pretend to be a ___ bit processor. As what went in the the ___ got bigger you may need to add some IC's to get the __ bit with. This program could pretend to be any processor you ever heard of but for the speed.
I do not want to call this microcode, but in some ways it act's like it.

You could do a lot of logic and to keep it simple, do steps working through a control program in control roms to control things. The PDP-11 's control roms were 160 bits wide if memory serves. The PDP-11's had an option that added more control roms to add floating point math if memory serves. The program in the control roms is normally called microcode.

You could have an option like the PDP-11/45 did to add some ram an additional to the control roms and end up with what they called a writable control store. A crazy capability when you think of it, Run a program on a computer and add special instructions to the existing instruction set, instructions that take advantage of the hardware to do something not possible before or faster.

I heard that in the later generation PDP's the rom's they could get were too slow, so they did a copy control roms the control ram step. I heard of a version of this that would be like your pic doing the initialization of the control ram.

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You could do a lot of logic and have logic dictate the steps instead of the control roms. Here if you goof you rework logic instead of updating some data in the control roms. Some micro's are built with this method.
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In the past I worked with what they called a bit-slice processor.
 

http://en.wikipedia.org/wiki/Bit_slicing

   In simple terms, if you put 4 4-bit bit-slice processors together and you could have a 16 bit processor.  I saw this once in a place you probably not expect, a printer.

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I heard that the dec vax ( a 32-bit CPU) was first a program on a PDP-11.
and I have seen in the bigger computers where they use a smaller computer to do the io. If you want to see this to the extreme, there was an article in popular science in the 1970;s I think. What that article did not say well could be,
"Take two of the worlds most powerful computers systems and use them to do the IO of the CRAY-1". Not quite right, but close. What the article did good on was the fact that the CRAY-1 was the little thing in the corner.
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if you want neat processor the NS320xx is one.
32 Bit address
 8 bit cpu with ___ registers.
16 bit cpu with ___/2 registers.
32 bit cpu with ___/4 registers.
The difference in a PDP-11 instruction for 16 bit  vs 8 bit was one bit, but still messy doing 8-bit to 16-bit steps
The NS320xx Instruction set made it real easy
add that it was designed with the idea that the CPU would be one or more chips.
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anyway, just use none or more and have fun.
C

[TheCrazyRichard]

I have heard something about the bit slicing before, I think intel had a whole bunch of various chips for making your own CPU of, I think it was the 3000 series if I'm right...
A printer full of these? Pretty nice

I don't want to use any ready-made ALU or stuff like that actually, mainly because I have none of em and I don't have much money to spend on this... I will naybe check some datasheets for inspiration later and do it myself...

And I wanted to use the PIC as some preloader, not a simulator, when the CPU itself would be held in reset until the program is loaded into the program memory.

I'll maybe use one more micro, AVR probably this time coz I have some of em atm, to generate video signals, so I could also do some simple graphics with the computer aswell...

But to achieve that, 4bit data width isn't really much. I'm thinking about adding a feature to the CPU that would make it able to handle register pairs easily and even make the ALU compatible with 8bit stuff. Maybe not fully, that wolud depend on the current status of my wallet and junk box

I could also add some 555-based sound generator, maybe even 4 or 16 channel 4 bit square sound for fun
No computer is complete without an annoying beeper!

Okay, I'm gonna sleep now, it's 00:45 here (UTC+1).

--Richard

[C]

cobwebs here

In the first PDP-11's, I think they used two 8 bit registers to get the width.
So 8 visible registers, 16 chips.
I do not remember if they used all 8 addresses in the hidden registers I told you of.
Lets count from 0
0. Statis register was one of the hidden registers
1. Unibus address (the address buss)
2. Unibus Data out ( data buss to memory/io )
3? I can not remember if they used #2 for Unibus Data IN ( data bus from memory/io ) they could have or it could have been seperate.
4. Interrupt vector address. The PDP-11 let you have many of the same type of IO each at a different address for it's data registers  When the IO generated an interrupt, it supplied an address to its Processing. One IO device could have many interrupts, each with it own address.
5. Interrupt Level; There was a concept of priority. If I remember 7 levels, so a device like a hard disk could interrupt a slow thing like a serial port. more than one could have the same level and I think lowest address won.

Front panel: When in stop mode, front panel with all the lights and switches basically controlled the unibus directly. You could see the contents of any IO register, memory and even the CPU registers. From the front panel CPU registers were a normal unibus address. So you could using just the front panel read and write anything. Some of the computers I worked with, you had to finger bone in the boot strap program, others had a boot strap program in rom.

Front panel: When in run mode, The data switches could be read at a specific address. Some boot strap programs used this to find out what device to boot from. Some programs even used this. Most PDP-11's the lights were connected directly to what they were to monitor, but on some machines the program could write to the lights.

Remember that wide control word.
This is memory here so numbers could be wrong but Idea good.
The 74181 has two sets of 4-bits for input and one set of 4 bits for output. If memory serves 4 bits to select what operation you want and some additional status bits out.

For speed they did as much as possible at ounce.
4 bits from control rom went to a 16 to 1 data selector to get data for 74181 input A
4 bits from control rom went to a 16 to 1 data selector to get data for 74181 input B
4 bits from control rom went to 74181 for function selection.
4 bits from control rom went to a 1 to 16 data distributor to route 74181's output
You now have two register values at the 74181's input, a function selected and waiting on the slow 74S181 output to get to the output of the  distributor.
a clock pulse an  register is updated.
the same clock pulse could update status register.

Each instruction was just a bunch of simple steps happening in parallel.

More in a sec
C

[C]

Now to cheat a bit and make it easer and more powerful.

What the PDP guys really wanted to use fell in to two categories. Too ____ Slow or Not available.

You can replace those separate register's with two port ram.
You can replace those separate register's with two steps.
so you can do like some RISC machines and use fast ram with two steps and two latches.

feed the two latches to the ALU and put it back in ram. If you need a copy of something like for something like the address buss just make a copy as you update the ram. Lots of general purpose registers.

Want to cheat more, the pic reads and writes the ram and does the ALU function. Still works, just a lot slower.

Need a reference to work from so lets use a Z80 to start
Address bus
Data buss
Control buss
     Address valid
    write/read
    Wait
    Interrupt
The Z80 bus works one way, the 6800 is a little different. If you look at a lot of chips they work with one or the other or both.
You said 4-bits so adjust the widths.

You want the register's outside the PIC, use a ram chip, Inside use some pic ram.

IBM cheats big time here, They design a nice big instruction set. If you have a lot of cash your 64-bit computer has a 64-bit processor. Not so much cash, a 32-bit processor pretending 64-bit. I would not be surprised it they have a 16-bit pretending to be 64--bit.
They even cheat on ram using virtual memory pretending to be Ram in the above.

All kinds of ways to cheat, the big guys do it all the time ( "The Cloud") the big pretender. If you do it right, you could have a program on a pc pretending to be the parts missing from a pic pretending to be a (Z80, PDP-11, Arm)

If it's too slow, use a faster processor, faster hardware or go parallel. The PDP-11/34 used one set of 74181's, I think the PDP-11/70 used two sets to gain a little speed So go crazy, just keep it logical.

C

[C]

You said you got 150 chips
look you might be surprised at what you find, a 74181 was not uncommon.

You said video, you might want to look at a 6845 or the same from intel.
You might do a separate video chip pretender, Use the chip or chips to give you ideas/hints on what's needed and how they did it

 I would strongly hint not to try to put too much in one basket so to speak.
You might want to think 4-bit cpu project and  a separate video chip pretender, and have the two talk.

Have fun

C

[TheCrazyRichard]

Umm, I've got 150 TESLA (good old czechoslovak manufacturer of electronics) 7400's only.
I have lots of others around as well, but I don't have any 74181, but I might ask my friend to check if he has one...
I've did a quick search on ebay and i found some, but... yeah, I don't know...

They have some in farnell i see... but they're quite expensive... 

It might speed up the design and also the operation though, so I will consider buying it...

Or maybe, do you have any? I think one should be enough, because then i could 'virtually cascade' it or something
Ofcourse if you have two of them, it would be even more awesome.

--Richard

[TheCrazyRichard]

I've completely redesigned (not only) the instruction set now.

Go check the main post!

 The computer will be probably much slower too, but also much better I think, because programming a '24bit memory' is easy, it's just three generic 8 bit memories and I could just get tons of them 

[C]

Richard,

Are you hearing an echo like Richard,,    Richard,

Getting the C.          C,     here, Think from my long dead Gran.
You know the "when you have done something wrong line" from a lady.

I left out a register in all our chat!
Not just any register, could be "THE REGISTER"

Give you a hint,
You read it from memory more than any thing else.





The "Instruction Decode Register"


74181's none here,there are newer numbers, But the reason they were used so much was that It made sense and a minor little thing of saving the space of a lot of separate chips. Some data sheets even list all the parts.
So no 74181, "Build It".
Me, I might look at it and say ROM __ x 8
 
Just got up, thought above imporantant.

C

[TheCrazyRichard]

 

I will actually latch the output from the memory with some 74LS gate, because the memory is CMOS. So i think that's actually in there
I know the jump instructions will completely fock the whole execution up if there was no latching, because I've actually done some tests of some of my CPU ideas in Minecraft. 

But I think I'm gonna rework the instruction set again, because it's kinda too much complex, so I think I'll return to my original idea of the CPU with a single program and fixed registers for the ALU, because it's probably easier to make and it would be maybe a bit faster.

I'll probably use 16 bit program width, because it's easier to get and program the 16bit memories these days... 



I think I'll make a new notebook for this and try to draw some schematics at school tomorrow, because it's really boring in there


Richard

[C]

Here Is a BIG Thing

Today almost everyone writes in hex or bits. For a lot of documentation they do not even make a nice all in one place list.

When you look at some old computers and other parts, You need to use their language not a translation that looses some information.

You thinking "What the _____"
Binary is Binary and hex is a simple way to write binary, so how can something be lost in the translation.

The PDP-11 was and octal machine! 
Look close at that Big huge front panel, They used lights for each bit but look closer and you see they grouped them in 3's not 4's
Every thing was listed octal first, and when you take the PDP-11's instruction set and list it in octal it just makes sense.

Bit 15  Word / byte

Bit 14  Instruction
Bit 13

Bit 12
Bit 10  Mode
Bit 9

Bit 8
Bit 7  Register
Bit 6

Bit 5
Bit 4  Mode
Bit 3

Bit 2
Bit 1   Register
Bit 0

In Hex you do not see the pattern an may not see it in binary.
"The PDP-11 is a 16-bit machine with 8 general Register's."
So looking at the above 2 operand instruction format
Modes = 8
Instructions = 4 with a choice of word or byte.

But with 4 instructions they would use all the 16 bit combinations. So they saved "00" and just had 3 "2 operand instructions"
If Bit 14 & Bit 13 = 0 then look at one operand instructions.
One operand instructions Saved the "0000"  for next subset

Someone looking at that nice front panel could quickly tell what is what, They had a cheat card that listed every instruction. Very simple and nice.

Now take a look at the Z80 instruction set in octal
If memory servers, All most makes sense in octal but had some specials as exceptions.

It is hard to find, but the "ARM" instruction format has grouping, they just did not stick with 3 or 4 bit groups

So for what it's worth, might keep above in mind.

C

[C]

Memory computer

One of the old computers I worked with pulled a fast one so to speak.
No CPU registers.
All Register were in memory.
If you worked on it, you quickly found out the trick. They just moved some of the normal memory inside the CPU. From the address buss they used all the address bits. Inside the CPU they used chip select and some address bits.
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Fixed ______ space.
Stack
  some CPU's you might say use fixed stack space. Not having to read/write main memory for stack operations can save time. The problem is that someone will have a problem with a fixed stack size. The more general an consistent you can get, the better.
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stuffing
From what I have seen, when you stuff a lot of different things in a Register it comes back and bites you big time. Better in long run to do a better job and not cram/stuff things.
Examples:
IBM stuffed things for the hard disk controller in the PC XT, They combined parts of two different Registers in a third Register such that they saved a few bits from the original two Registers and ended up with three shorter Registers. They saved a few bits at the cost of slower software and future Hard disk size increase.

68000 remember 32-bit address inside, chip limit to 24-bit outside. Some programmers thought "There is a byte wasted in every address" . They did their thing and it worked,---- until the 32-bit outside parts arrived.     
 

C

[TheCrazyRichard]

I've completely rebuilt the instruction set now, and also the whole architecture. From now, it's not 4bit anymore.

It's gonna be an 8bit computer! WOOHOO! 


Since our success with an xRisc 3L - based 8bit computer we made in Minecraft, my friend joined me at building this computer.

This computer doesn't include a stack actually, but it can be implemented by software actually! ( ) It's completely mad, but it might work.

It doesn't include interrupts either. What a piece of garbage, eh? 
But it has some 'WAIT' instruction, which just sorta halts the CPU until it receives a signal there. Good for syncing stuff together i think.

Also, we're probably going to use 74LS logic ONLY. Why? Coz LS's fast! Okay, I know if i used HCT or HC instead, it would be cheaper, won't consumpt an arm and a leg, and it would be about the same speed. But well, for a classic old-school feel you need oldschool gates! And that's why i don't wanna use any CMOS garbage there. ( )

RAM and IO space is gonna be shared on the same data and adress bus. This might actually make making the bootloaders quite easy i guess!
One of the targets I haven't mentioned yet, is to make the computer 'stackable'. By that i mean 'stacking' the registers and ALU up, while still using a single instruction decoder. Why? Why not! You could easily make a 16bit CPU out of two 8bit ones! And so on.

So what do you think about this? How much 'garbageous' is it actually? 


Richard, the crazy one.