Author Topic: EMG Analog Front End Design - High Input Impedance Requirement  (Read 288 times)

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Offline hlord2000Topic starter

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Hello,

I am developing a surface EMG data acquisition device.

Requirements are as follows:
High input impedance (>>GOhm)
CMRR >=120dB
Gain of 1000-1300

Expected signal is ~1mVrms with a variable +/-200-300mV DC offset.

I am planning to use an ADS131M08 differential delta-sigma ADC and to beam the data out using an nRF52840 or similar. This device also has an internal PGA w/ 128 max gain (would it be worth using this amplifier as well?).

My intuition was to keep the signal differential even in this "pre-amplifier," using an instrumentation amplifier because of its very high input impedance and CMRR. I selected the INA821 and referred to this AD document as a guide:
https://www.analog.com/en/resources/analog-dialogue/raqs/raq-issue-161.html

However, I realized that I would need a way of AC-coupling the inputs because of that DC offset. I found references to DC servo circuits that I could use so that I do not sacrifice my input impedance target.

My questions are:
- How can I provide a path for input bias current while maintaining my gigaohm impedance target?
- Is it worth using the topology seen in the AD blog post?
- Is there an alternate way to AC couple the signal?
- Is it reasonable to use the in-amp with a Gain ~1000? Should there be previous/subsequent parts of the filter chain that add gain?

I have attached a block diagram for reference.

Thanks! Please let me know if I have made any fundamental mistakes or am misunderstanding something.

 

Online moffy

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Re: EMG Analog Front End Design - High Input Impedance Requirement
« Reply #1 on: March 15, 2024, 02:58:46 am »

- How can I provide a path for input bias current while maintaining my gigaohm impedance target?

(Attachment Link)

Bootstrap the input bias resistor, it means you might need a unity gain buffer as the first stage, but if you have a unity gain buffer of 0.999 gain and 1M feedback/bias resistor the bias resistor looks like 1G.
 

Offline Terry Bites

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Re: EMG Analog Front End Design - High Input Impedance Requirement
« Reply #2 on: March 16, 2024, 04:42:01 pm »
Ok. Fist off, do you really need Gigs of input Z? A few pF of stray cable capacitance could kill your frequency response.
The source impedance of prepped surface electrodes is in the kohm or less region. 10k on a friday afternoon...

The important make or break stuff:

Powering the front end from a mains connected supply is going to ruin the system's CMRR. Do not ground via any path!
Isolation significantly boosts the apparent CMRR so you can relax a bit on the INA performance. IMRR!
Ideally you don't want ground your patient either. Conecting signal or signal common to a mains powered item will have the same effect.
Use a "Driven Right Leg " CM reduction scheme. Use driven shields. You often see the CMV taken off the INA at the center piont of Rgain and buffered onto the electode lead shields. In practice this can cause instability. Drive the lead shields with 0.9 to 0.95 Vcm.

In most cases you can meet the 60601 safety standards with 180k series resistors in all patient connected lines.
Protect the amplifier with low capacitance data line protectors. eg TPD4E02B04 .
The front end DC gain needs to be <10 else your half cell potentials will drive it into satturation. AC couple that into a high gain amp.
Yeah, terrible overload recovery times. Overload detection really helps. Its basically a window comparator that discharges the coupling cap after an "incident"
Back to back Shottky diodes across Rg help tame excesses. (BAS40-05)
My advice is to use a low power digital wireless solution.
 


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