Trying to make a simple analog PID controller

[KX36]

Hi guys,

There's a standard opamp voltage error amplifier circuit you've probably seen if you've even done anything to do with DC-DC converters or switching power supplies that equates to a simple single opamp PI controller when type II compensation is used. Although I have no formal electronics education, SMPS is my thing and I've designed quite a few of these things over the last couple of years. However in these designs, I could never get rid of overshoot voltage completely (while keeping a decent transient response), the best I could do was limit the maximum current into the output capacitor to 20% over the load current and that would reduce the voltage overshoot to an acceptable level. Never really gave it much thought.

I was just mucking around in SPICE with an idealised model of a current mode controlled SMPS and found that even with this very simple idealised model, I still get that overshoot and I beleive I have tracked it down to the time spent discharging the integrating capacitor on the error amp. I'm sure this is not news to anyone with some kind of formal education in systems control.

My question is how to add a derivitive control to this to change it from PI to PID control and try to do something about that overshoot.

I do remember reading a long time ago that type II compensation is PI control and type III is PID, but for one thing I haven't been able to test if that's true and for another the particular loop I'm fiddling with is difficult to set up as type III compensation, (at least not without a mega high bandwidth opamp) since it's current mode control the plant is first order so I can't add much phase boost in the compensator and still have it crossover at an appropriate frequency and phase margin.

Any help you guys can provide would be much appreciated.





Cheers,
Matt

[Kremmen]

You introduce a D term by inserting a cap in parallel with R1 in your diagram. The derivation time constant will be the cap times the amp feedback R3. The position of the resulting zero in the Bode plot is determined similarly.

[sorin]

http://newton.ex.ac.uk/teaching/CDHW/Feedback/

[KX36]

Thanks, yeah, like I thought, type III compensation for PID control.

I managed to optimise it adding a resistor and capacitor in parallel with R1. As I thought, I needed a really big GBWP to avoid ringing in the current waveform, 100MHz to be specific, it also pushed the crossover frequency up to 10MHz (sounds good but my idealised current source isn't valid at such high frequencies). However by greatly reducing R3 and changing the rest of the compensation network to make up for that, I got it more optimised to work with a 5MHz opamp with minimal ringing on the current waveform and a 500kHz crossover. I'll push it a bit further to completely get rid of that ringing and lower the crossover frequency closer to a reasonable amount below an idea of a switching frequency.

Cheers.

[nickm]

Almost all controllers get around this problem by limiting the output of the error amp during startup (soft start) to keep it from saturating.  The problem is your AC analysis is only valid long after the transient is gone.  When your error amp is saturated it will have no (very little) gain so your crossover and phase margin are much lower than you think they are.

[atferrari]

Google for Bob Pease who designed the most simple PID circuit ever.

[Mj12]

As nickm said your problem is not the small signal behauviour. and you will not benefit from adding D term or from faster opamp. One easy fix that you can try is to limit the rise time of the Vset signal. Mayge 1n/5k Rc lowpass filter.
Your problem here basically is that when you apply changing signal to the non inverting input of the opamp, you essentially have wrong charge in the integrating capacitor for the new operating point. That causes opamp to saturate and not control anything for a while.

[KX36]

Thanks for the replies.

Adding the D term did work to tune out the overshoot since as the error approaches zero, the current is decreased and the voltage waveform slows down before it hits the limit, but only under the single condition shown above. As people have said, it doesn't work ideally because the overshoot is when the current limit turns off and the voltage error amplifier kicks into action. While the current limit is on, the opamp saturates and it takes time to recover from that (and discharge that capacitor). If the voltage error amp wasn't being interrupted by the current limit I think it should work better. As it is, I have it tuned to get rid of this wost case overshoot on startup when the current limit stops, which means at other load conditions where it isn't held to the current limit while charging the capacitor, it is overdamped.

I wouldn't mind if that was the end of the story, but unfortunately if I step a load in after startup enough to push it into the current limit and then remove that load, it again has the problem with the integrating capacitor discharging holding the current up too long and the overshoot returns, but this time when the capacitor finally discharges and the errror amp comes back into action finding voltage is now too high, the D term slows the return from overshoot rather than slowing its ascent.

A PID controller won't work as an ideal PID controller if the loop is ever broken like when this current limits. I'd probably have to current limit in a different way than by simply clamping the voltage error signal into the voltage controlled current source to get around this.

Nickm; Yeah, I know about soft start, but it only works on startup which means after startup the step response is not helped by it and a step load will produce the overshoot as shown.

Mj12; Limiting the rise time of Vset is something I had considered for the initial overshoot, but it will not help when Vset is constant and Rload is what changes.

[KX36]

A little update on my last post. I got round that later overshoot issue by increasing the output capacitance so that before the error amp comes back the voltage ramps up more slowly (lower dV/dt) and decreasing the integrating capacitance so that the time before the error amp comes back is less, so that it isn't able to overshoot much past the target voltage before the error amp comes in, then retuning the differentiator for acceptable response in worst conditions.

It still overshoots a small amount and rings a couple of times at the differentiator RC frequency (the resistor and capacitor added in parallel with R1) but much less than before, the overshoot is at a more acceptable level. I'd like to damp that ringing, but not entirely sure how since its not a ringing LC like I'm used to and I don't know how the circuit manages to make an RC ring.

Now if only ideal components existed in real life I might have some confidence that it could perform somewhere near this well.  Spent far too long on this considering I was initially just mucking around.

Startup transient and stepped load (I1=4A on top of the baseline 2A load) just into the current limit (6A).