4 Layer Board... Power Layers?

[domthejazzman]

I have been trying to find some design rules, but as I can't I am sort of thinking that it just shouldn't be done. But has anyone tried doing a multi layer board with different voltages on certain layers? It is basically going to be a power distribution board for a drone.

My plan was to hopefully do a four layer board like:

Layer 1: +12V
Layer 2: +5V
Layer 3: +3.3V
Layer 4: GND

I can easily do it as say... a two layer and have separate regions but a 4-layer would save a bit of space which would be awesome.

If anyone knows anything... some advice would be greatly appreciated!

[Rerouter]

It will work, just be aware the inner 2 layers are generally 0.5 oz core copper, independent of what the outer thickness is,

Also you may want to move ground between your 2 highest current layers to provide some capacitance.

[ataradov]

This is a typical design for high-speed boards, like FPGA or DSP. There you typically see ground layers in between every power layer, but it is not necessary here, of course.

[domthejazzman]

Ok, sounds like it is a go, I will keep trying to find a bit of documentation on it. And I will shift the layers to something like:
Layer 1: +5V (layer 1 as I just realised they want some surface mount stuff on +5V)
Layer 2: +3.3V
Layer 3: GND
Layer 4: +12V
And I will check that the 0.5z core copper will do the trick for those inner layers. Thanks for the help so far!

[MagicSmoker]

I have been trying to find some design rules, but as I can't I am sort of thinking that it just shouldn't be done. But has anyone tried doing a multi layer board with different voltages on certain layers? It is basically going to be a power distribution board for a drone.

The old saw, "a ground plane cures most ills" has a lot of truth to it. Which is to say, as long as one layer of a 4 layer board is a continuous ground - broken only by vias or through-hole component pads (ie - NO TRACES!) - you can damn near do anything you want with the other 3 layers.

So if assigning 12v, 5V and 3.3V to separate layers in this case reduces routing complexity and/or the number of vias then why not? However, I would be very skeptical that putting 3.3V and 5V on separate layers gains anything; a better approach might be this:

Top - signal traces, 3.3V, 5V
Top Inner - ground
Bottom Inner - signal traces, 3.3V, 5V
Bottom - 12V

Assuming that the 12V rail carries the highest current and so would benefit the most from the higher allowed ampacity of traces on the outer layers.

[T3sl4co1l]

Assigning layers strictly on voltage is as foolhardy as any other arbitrary assignment.

A rational approach considers what layers are facing.  You almost always want a ground plane near a signal layer, so 50% of the board layers should be (AC) grounds.

Supplies are heavily bypassed to ground, so they also count as AC ground.

The remaining layers are used for routing, with as few interruptions of the ground plane layers as possible.

Nets are assigned "ground" duty based on priority.  GND proper is always the biggest net, so takes the highest priority.  All other nets, whether supply or not, get routed with traces and vias.  In a 2-layer design, you normally route all supplies, for this reason.

On a 2-layer design, you must route everything on one side, and pour the other.  This doesn't leave you with any way to cross over traces, so you must make the exception that the ground won't be perfectly solid, but will have slots cut into it, from the clearance around traces jumping around.  These slots can be stitched across by adding GND jumpers on the other side, so it's okay.  But, in fact, why not continue the process until the two layers are symmetrical?

That is: anywhere a trace is routed, on a given layer, there should always be ground pour around, or opposite, it.  Layers can be changed freely, as long as ground is present on both sides.  Note that, where two traces cross (one on each layer), there is necessarily a spot on the board where ground is absent, top or bottom.  Minimize the areas of these holes, and stitch around them.

The typical design approach looks like this:



GND is poured on both layers, with the expectation that, each pour will end up punctured so that it's more like a "half layer" each.  Both together -- stitched into a whole -- add up to one full GND layer: we can meet the requirement of "half ground layers" this way.

Where traces on top (red) cross traces on bottom (blue), ground is allowed to fill in around them, and is stitched with vias.


In a 4-layer design, you must place parts on one or both outer layers, and it's natural to route on the outer layers as well.  This leaves the inner layers for ground.  And, since there are two layers, you can make one a supply, properly.

The whole layer doesn't need to be one single supply rail.  It just needs to be filled with something at AC ground.  You can divvy it up by area, so the digital section has 3.3V under it, the interface section has 5V under it, the power section has 12V under it, and so on.  Within each region, the other supplies must be routed by traces.


In a 6-layer design, asymmetry is undesirable, so you normally again choose two ground planes (which, again, both don't need to be ground per se), and the two extra layers can be used for routing.  The normal stackup goes Top - GND - Inner Routing 1 - Inner Routing 2 - VCC - Bottom.


For 8+ layers, alternating routing/signal and GND/VCC layers, or layer pairs, is normal.

Tim