Author Topic: Ethernet link detection  (Read 1479 times)

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Offline rakeshm55Topic starter

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Ethernet link detection
« on: November 12, 2019, 08:49:27 am »
Hi,
Assuming
1. A generic 10/100 Ethernet PHY
2. Using the general purpose registers

What is the logic used by controllers to detect link from an Ethernet PHY. Do they keep on polling the link up bit from the register set??
If so How frequent do they poll this register via MDIO??
Is there any literature or code snippet (C code ) for this ??

My purpose is to use FPGA (vhdl) to detect link up/down from an Ethernet PHY.
As I understand there are PHY dependent features like interrupt, but I would like to stick with general purpose registers. Once the approach is clear i can hand code  vhdl for this purpose. So that FPGA an frequently keep track of link up and down status.
 

Offline GeorgeOfTheJungle

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Re: Ethernet link detection
« Reply #1 on: November 12, 2019, 09:18:00 am »
Do they keep on polling the link up bit from the register set??

Yes.

Quote
If so How frequent do they poll this register via MDIO??

Every 1..5 seconds.

Quote
Is there any literature or code snippet (C code ) for this ??

The PHY register set is a standard (IEEE 802.3). You just have to check bit #2 ("Link Status") of the basic status register (that's register #1).
The further a society drifts from truth, the more it will hate those who speak it.
 
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Offline rakeshm55Topic starter

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Re: Ethernet link detection
« Reply #2 on: November 12, 2019, 09:25:34 am »
On more query

If there is continuous Rx activity (receive data) then will it hold the polling loop?? or reset the timer ??or they just keep on polling no matter what activity in Data receive.
 

Offline GeorgeOfTheJungle

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Re: Ethernet link detection
« Reply #3 on: November 12, 2019, 09:36:01 am »
I think the driver keeps polling no matter what. When it sees lost link, triggers a renegotiation.
The further a society drifts from truth, the more it will hate those who speak it.
 
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