Author Topic: Op amp design  (Read 1400 times)

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Offline iwaszTopic starter

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Op amp design
« on: April 20, 2019, 01:56:45 pm »
Dear all

   I have a position sensor which produces differential signals. I believe it is made of two potentiometers set up that turning the knob lowers resistance of one pot and rises in another pot. Both pots are around 2k. Now I did my best to come up with a circuit which would simulate slight  rise of the output signal (like position sensor would be slightly off its normal position). So its like introducing slight constant bias (bias, rise, sorry, don't know how to describe it correctly) while still be able to use the position sensor as usual. My solution is that:



On the left hand side you have two differential outputs (depicted in green and blue on the plot). When you move the position sensor, one of them rises and second one falls and they sum up to 5V which is also a supply voltage of the circuit and the sensor.  First pair of the op apms looking from the left act as a simple buffers, because I wanted to be sure the input impedance is high, so the sensor and the rest of the system wont be disturbed in any way. Then the second pair of op apms (U2 and U1) works as an inverting amplifiers with amplification equal to 1. R10 and R9 are both parts of a dual potentiometer. Outputs are depicted in red and cyan. Oh, and on the left side of the plot the sensor is in its minimum position, while on the right side it is on its max.



I built it and it works in real life, but the question is : isn't this circuit over-complicated? Or if it's not, do you see some obvious pitfalls that I can run into when using this. What can be improved? I rarely do analog stuff. Thanks a lot.
 

Offline OM222O

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Re: Op amp design
« Reply #1 on: April 20, 2019, 03:53:02 pm »
I'm not sure what you are attempting to do, but what does the position of your sensor has to do with creating a bias?
Do not build your own differential amplifier! Buy one as the resistor matchig is critical. Instrumentation amplifiers are another great choice in this case. If you provide more details as what you are trying to achieve it could be helpful. What I understood from what you described is somehow you have 2 pairs of pots which create a differential input but your circuit suggests there is only one pair  :( :-//
 

Offline iwaszTopic starter

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Re: Op amp design
« Reply #2 on: April 20, 2019, 08:44:15 pm »
It seems I wasn't precise enough sorry. Indeed - my schematic is slightly different of the real life implementation, simply because it was meant to be simulated in ltspice, and I don't know how to simulate pots in it. V1 and V3 mocks the position sensor in question. Since I believe it consists of two pots, which in turn are voltage dividers, I replaced it with those two voltage sources (V1 and V3). The rest of the circuit is my aforementioned design which introduces this "bias", or "offset" if you wish (I am still not sure about the terminology which may also confuse potential readers). And this bias/offset is meant to be controlled by a dual pot installed in my circuit (symbolized by R9 and R10), not the "position sensor" itself. So when installed between the position sensor and the computer which reads it, my circuit will simulate as if the sensor was slightly moved from its original position, and this slight "bias / offset" can be controlled by this dual-pot R9/R10.
 

Offline OM222O

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Re: Op amp design
« Reply #3 on: April 20, 2019, 10:26:32 pm »
well is it not possible to generate that offset in software or to compensate for it?
if not you can always drive the Vref pin of the difference amplifier to add a DC voltage offset.
 

Offline Zero999

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Re: Op amp design
« Reply #4 on: April 21, 2019, 08:21:07 am »
It isn't obvious what the original poster is trying to do.

There are several ways to simulate a potentiometer in LTSpcie. Unfortunately none of them are obvious. The easiest is to use the .step param SPICE directive, which runs the simulation with different values of a variable. Resistor values can then be set to that variable or using a athematic expression.

Here's an example.

.step param POT 0 1k 100R means step the variable POT from 0 to 1000, in increments of 100.

The resistor values which need to be changed are set to {10k+POT} so their values will be swept from 10k to 11k.

The .op simulation mode is used because we're only interested in the DC values.

Other ways to implement potentiometers in LTSpice are to use a resistor with its value based on the time, a current or voltage. and the .tran simulation mode. There's also a third party potentiometer library but it needs to be distributed with the .asc file, otherwise it will generate errors is someone opens it and they don't have the library.

Note that SPICE doesn't permit zero Ohm resistors. Always ensure the value is above zero, otherwise it will result in an error.

EDIT: I've made another thread about simulating potentiometers using LTSpice. See link below.
https://www.eevblog.com/forum/beginners/simulating-potentiometers-using-ltspice/msg2358510/#msg2358510

« Last Edit: April 21, 2019, 02:27:25 pm by Zero999 »
 

Online ledtester

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Re: Op amp design
« Reply #5 on: September 26, 2023, 01:31:30 pm »
I realize this is an old thread, but I’ve spent a lot of time figuring out what’s going on here that I can’t help but to write it up.

The Problem:

The OP has a sensor which outputs two voltage signals, Va and Vb, and these signals are complementary in the sense that Va+Vb is always 5V.

The objective is to derive a new pair of complementary signals (Va+dv, Vb-dv) where dv is a bias voltage that can be set via a potentiometer.

The Circuit:

In the schematic R10 and R9 represent a ganged pot which controls the bias voltage and therefore they will always have the same value. Call this common value Rx.

Let V1 represent the signal Va and Va’ the output of U2. Likewise let V3 represent Vb and Vb’ the output of U1.

If you go through with the circuit analysis you find the following:

Va’ = 2*(2.5 - dv) - Va
Vb’ = 2*(2.5 + dv) - Vb

where dv = 5*(Rx/2)/(20+Rx)  (Rx measured in K ohms).

Using the fact that Va and Vb are complementary we have:

Va’ = 5 - 2*dv - Va = Vb - 2*dv
Vb’ = 5 + 2*dv - Vb = Va + 2*dv

which gives us the desired biased pair of complementary signals. Note that output Va’ is derived from the input Vb and vice-versa and so this approach very much depends on the complementary nature of the inputs.

Two ltspice pointers:

- You can make sure that R10 and R9 always have the same value by having them reference a parameter. Define Rx as a parameter with .param Rx=1k and then set the resistance of R10 and R9 to {Rx}.

- A cleaner way to create a ramp signal is with the PWL waveform, e.g. set the voltage of V1 to PWL(0 0.6 0.1 4.4)
« Last Edit: September 26, 2023, 01:33:36 pm by ledtester »
 


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