I have cooked up a $79 USB Packet Sniffer that's an add-on for the FX2LP boards that you can get for a few dollars on ebay and similar sites. FX2LP boards are also sold as Ez-USB or CY7C68013A boards.
You can get the marketing pitch at
bugblat.com/products/ezsniff/, here is some technical info.
How does it work? Essentially the ezSniffer is a special purpose logic analyzer. An on-board FPGA samples the USB signals, compresses the samples, and sends the compressed data to an analysis PC via the FX2LP's buffered high speed USB link. Software on the analysis computer decompresses the samples and puts up the pretty pictures.
What can it sniff? Full Speed USB devices of course, but also High Speed devices. All High Speed USB devices start off at Full Speed, then negotiate a change up to High Speed. The ezSniffer prevents the change up.
How deep is the buffer? For the compressed samples it is up to 4GB in theory, though we have not tested that deep, current software sets a 256MB limit. If your main concern is the configuration packets 16KB of compressed data is usually enough.
There's lots more - disconnect/connect so that you can sniff the configuration packets, you can save the data and play with a python interface, you can even write protocol decoders in Lua....
I'll do my best to answer any technical questions here.