Electronics > Projects, Designs, and Technical Stuff

FAST A>D conversion

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stj:
i have scopes,
and eval boards etc.

i'm looking to make something handheld so i dont have to keep looking down at chips and then looking up to a screen.
here is how it would function, it would grab a sample as fast as possible, purely to avoid sampling mutiple states in one shot,
then it would display the voltage as a simple led bar.

big bar = signal good, small bar = signal bad - probably from a failed chip output or blown internal pullup.

IDEngineer:
My inner Bob Pease is whispering that this should be done in analog, not digital. Maybe a pair of opamps, one each to detect and display the low and high voltages. Getting your 20MHz bandwidth is child's play in the analog domain. Total cost could be a couple dollars. You could still have the bargraph display you described, if that's even the optimal approach... lots of options.

stj:
maybe,
but i have over 30years of digital experience inc software.
my analog skills go about as far as selecting the right resistor to drive an led, and knowing how to get a clean output from a regulator!!
 :-+

splin:

--- Quote from: stj on April 07, 2019, 12:57:14 pm ---i have scopes,
and eval boards etc.

i'm looking to make something handheld so i dont have to keep looking down at chips and then looking up to a screen.
here is how it would function, it would grab a sample as fast as possible, purely to avoid sampling mutiple states in one shot,
then it would display the voltage as a simple led bar.

big bar = signal good, small bar = signal bad - probably from a failed chip output or blown internal pullup.

--- End quote ---

So you want a sampling rate of a few Hz with an acquisition time of 50ns or less to minimize the probability of sampling during a signal transition. You don't need a high speed ADC, just one with a fast(ish) sample and hold - or make your own sample and hold with an analog switch, a capacitor and a jellybean CMOS or FET input opamp.

I'd still suggest using a microcontroller as your solution is useless for signals which have a high or low mark/space ratio such as the write strobe of a RAM chip which might only be active for very short periods (a few hundred nano seconds perhaps) with relatively long off periods. The probability of sampling it in the active state woud be very low for sampling rates of a few Hz.

Using the $2 STM32L412 would be cheaper and simpler (H/Wwise). You would only need to use one of the ADCs running in 6 bit mode, configured for a sampling time of 2.5 clocks or 31.25ns. You could use your method by running the convertor a few times per second and calculate and output the bargraph driver signals on GPIOs but you could do much better by running both ADCs interleaved at 17.8MSPS and use the processing power to examine the signal. The capture and processing doesn't have to be continuous so you could capture almost 40,000 samples into a RAM buffer and then process it at leisure.

As a minimum you'd look for short pulses to ensure they get displayed. You could also look for overshoots/undershoots/oscillations in signal transitions and perhaps light additional LEDs to flag that it is worth further examination with a proper scope. Another possibility is to look for other anomolies such as runt pulses or glitches, and/or detecting a tri-stated signal level and displaying its voltage - even if it spends only short periods in the tri-state condition.

When updating the bar graph you could ramp up, or down, the level at a speed proportional to the signal transistion time (obviously within the limits of the 17.8MSPS  sampling rate). This could be helpful to detect overloaded signal lines or weak drivers.

Use two STM32L412s and interleave all 4 ADCs to get over 30MSPS for better signal timing resolution (but still subject to each ADC's 31.25ns minimum acquisition time).

Use the built-in USB peripheral to connect to a PC for uploading data or configuring thresholds, timings etc. relevant to the circuit being tested.

Whatever ADC you use you will almost certainly need to buffer the signal as high speed ADCs require low impedance drivers for accurate results. Without a buffer it could cause glitches to the signal as the ADC switches its sampling capacitor. The buffer would be very simple - just an opamp configured as a voltage follower. It would have to be reasonably fast to handle the signal frequency of course - say 50MHz BW or more, so not a cheapie LM324!

IDEngineer:

--- Quote from: stj on April 07, 2019, 12:47:54 am ---the high bandwidth is needed to capture the state before it changes, you dont need to update the leds at that rate because you only need to see the high and low signal levels to evaluate the quality of the signal.
--- End quote ---
Despite your bargraph comments, it sounds like what you really care about is insuring that a logic low is "below a certain threshold voltage" and a logic high is "above a certain threshold voltage". That could be done with two discrete LED's.

For now, I'm sticking with my analog recommendation. Two analog comparators could do this in a single IC and deliver 20MHz without even breathing hard. No "missed levels because they happened between samples", either. And if you really want a digital output for some downstream purpose, the comparators can drive into digital circuitry... there are even comparators with open-collector/open-drain outputs for exactly that purpose. You can even have controllable hysteresis to reduce your noise susceptibility, basically for free.

This project reminds me of the guy who wanted to double the amplitude of an analog signal, and his plan was a full system of antialiasing filter, A/D, MCU, D/A, and output filter. That way the MCU firmware could multiply the samples by 2.  >:D

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