Electronics > Projects, Designs, and Technical Stuff
fast CC/CV power supply take two
exe:
Hello my friends,
In my previous attempt https://www.eevblog.com/forum/projects/how-to-design-fast-bench-supply-with-cc-and-cv/ I didn't reach my performance goals. Namely, fast operation under wide range of current, while having minimal output capacitance. I decided that output current range (0-2A) is too much for the topology I chose. So, here is another project that aims at low currents. Desired characteristics: 0.5-12V 0-50mA, stretch goal: 0-30V, 200mA.
The circuit I draw is a bit of a mess (I blame kicad :)), so I describe it here in a few words. It's a shunt voltage regulator with a constant current source. This way two loops (CC and CV) are always active. When output voltage drops below set voltage and then goes back, U5 has to slew a little bit. To reduce slewing time, there is voltage shifter V1 on schematic. I used a photovoltaic cell for that, hope it will work. I'll post later more details how the circuit operates, and why I think it should be faster than a typical mosfet current source (spoiler alert: using mosfet in saturation region for intrinsic current regulation and cascode).
I just assembled the board, and did a very quick test: output current set to 10mA, load step 840 Ohm to 5k Ohm and back. Rise time is 0.85us, clean step response, which is pleasantly good). There is no output capacitor except parasitics. The load step is generated by TS555 onboard timer.
This is my first four-layer PCB, and my first use of kicad. Mistakes were made, I screwed voltage regulator part, namely swapped opamp IN+ and IN-. I will have to think how to bodge it. Another problem, minor but annoying: in Art of electroncs 555 timer circuits don't have reset pin connected. So I left it floating. I guess you know that was a bad idea. A bigger issue: the timer has output voltage of 10V, which is probably too much for the fet that does step load. Idk which fet I used, probably FDV303N (Vgs max 8V ). So, fet may die, but hey, it's a proto board. The fet has zenner protection on the gate, which I think might explain why circuit suddenly stops working when I raise power rail beyond 10V.
Question: do I need to short my ground clip? Is it ok for raise times around 300-500ns? I use 10x probe.
Challenges:
- the biggest one is accurate current measurement as now current depends on two resistors: the one that sets current, and the one that shunts output.
- voltage doesn't go all the way down to zero, because of the drop on shunt resistors. I cannot remove shunt resistors (forgot to show them on schematic) because I need to measure current. So, in the worst case in CV-mode minimal voltage is 0.6V. In CC it goes down zero no problem (I think, need to test).
That's it for now, off I go to celebrate my first PCB in a while.
T3sl4co1l:
Probe clip should be fine around there. Can always check both ways and see how it affects the edge.
Tim
exe:
I'm now testing voltage regulation section. And I've got problems with it. Ignoring huge voltage spikes when switching CC/CV, the voltage sags quite a bit, and slow to fully recover. I figured I put a wrong capacitor in feedback loop: 1u instead of 1n. I fixed that, now new problems)
One is overshooting, and another one is capacitive load. Anyway, here are some scopeshots to make this thread a bit less boring. One the first one you can see two responses when stepping CC/CV from 1 to 5V, one from pfet-bjt complementary feedback pair (CFP, Q6/Q7, blue trace), driving voltage 1.7V or there about), the other one is just plain bjt (Q8, yellow trace). Overshoot is significant in both case. CFP also has significant ringing, suggesting it needs more compensation or something.
The second shot show help of photovoltaic level shifter. Unsurprisingly, a 650mV shift corresponds to 650mV less overshoot. As of why the drop is 650mV, I'm a bit puzzled. I use an IR led, the forward voltage drop last time I measured was 1V. But in circuit it's only 0.65V. I guess that's because photovoltaic cell outputs only 1.24uA of current?
PS I included schematic of the PSU.
exe:
My friends, I think I found a flaw in current regulator. It works the best when the voltage across shunt is large. Which makes sense, I just didn't take this into account. This limits minimum current on the range. I think about 0.1V is the minimum voltage for this approach. This can be seen on the following two plots showing 1V-10V step response for 25mA load:
100ohm_25ma.png vs 5ohm_25ma.png . The later has twice lower rise time. Also notice that top of waveform is not flat. That's because the mosfet current source is not ideal, and an overcompensated opamp has to adjust voltage a little bit:
Finally, I include 100mA step response. This is about maximum I can get from sot-723 pass fet (RZM001P02T2L) without risking to burn it. Not that I didn't try to push thru it 200mA, it just started to smell bad, so I had to reduce the current). Here it is:
Next is try to get voltage regulation. Last time I tried I got nasty overshoots and oscillations.
exe:
So, I have problems with the circuit, so I decided to first make CC mode working reliably. So, what I did is:
1) tried different pass transistors and select the one with fastest response
2) optimize opamp feedback.
It seems the smaller gate capacitance, the better performance. So, I chose tp0606n3. It requires a heatsink. Fortunately, I have one. The heatsink on TO-92 looks a bit ridiculous, but it works, lowering temperature from over 100C to about 66C under worst condition (100mA at 10V).
As of opamp feedback, it turned out I can just drive the fet directly, no oscillation so far. I include two plots for 1V-10V step response in CC mode for 100mA and 10mA loads. Imo looks fine. Idk why there is a small step, that's currently not an issue, though might be an indication of something interesting.
Currently, the biggest issue is that CV mode is slow and oscillates (screenshot attached). I'm investigating this. I really hope it's not two loops fighting, as I don't have much skills to resolve that.
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