EEVblog® Electronics Community Forum
Electronics => Projects, Designs, and Technical Stuff => Topic started by: Inna89K on July 29, 2026, 11:31:11 am
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Hello everyone,
I am designing an automatically tuned series Lf-Cf resonant network. The purpose of the tuning is to compensate for the tolerance of the Lf inductors in mass production.
The capacitance is adjusted using a switched capacitor array. A simplified schematic of one switching cell is shown below.
[attachimg=1]
Circuit parameters:
• Operating frequency: 6.7 MHz
• Voltage across V2-V1: quasi-sinusoidal, up to 50 V peak
• Current through Lf: quasi-sinusoidal, up to 3 A peak
• Capacitor switching occurs only occasionally (during tuning), so the switching frequency is many orders of magnitude lower than 6.7 MHz.
Someone suggested that, because the MOSFETs switch very infrequently, I could avoid using an isolated floating gate driver and instead drive the gates through a PI network (capacitor – large resistor – capacitor) referenced to the floating source potential.
I have several questions:
1. Does this approach make sense for this application?
2. Is the proposed gate-drive circuit (shown below) correct?
[attachimg=2]
3. How should the values of the RC components in the PI network be selected? Are there any application notes or design references describing this technique?
4. Does the Switch_ON control signal also have to be referenced to the floating source potential? My capacitor array will be controlled according to the measured average input current, and my current sensing circuitry is currently referenced to the logic ground. What is the recommended way to interface this logic-domain control signal to the floating gate circuit?
5. Has anyone successfully used this technique to drive floating MOSFETs, or am I misunderstanding the original suggestion?
Any advice or references would be greatly appreciated.
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I've worked on switched tuners quite a bit, using both relays and transistors as switching elements. A few comments:
1. If using FETs, you will need to use a back-to-back pair (sources and gates connected together) for each switch. Unless you somehow put a large DC bias on V2-V1 (higher than the max amplitude of the AC component).
2. A simple gate drive scheme like what's shown in your schematic might look fine in theory, but falls apart in practice. Hard to describe in detail, but if you make a simulation model of the circuit and play around with it, the issues become clear.
3. Also be aware that when the FETs are off, they will have some residual capacitance across the switch. And that capacitance will be highly nonlinear, which might be a problem depending on your application. Using GaN FETs will reduce this additional capacitance somewhat.
If the switching is very slow, then using photovoltaic isolators (PVIs) for driving the gates is probably your best bet. This is basically how normal solid state relays work.
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Is there not a better way to generate a stable 6.7MHz so you can avoid tuning?
What's the actual objective here?
Why 6.7MHz?
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Maybe using pulse transformers? You could use Ethernet trafos, two per pack and easy to source
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Optomosfet solid state relays.
Example: https://www.digikey.com/en/products/detail/apsemi/GAQY211G2S/25854831 (https://www.digikey.com/en/products/detail/apsemi/GAQY211G2S/25854831)
Larger ones exist, but, I don't believe you are seeing 3 amps across each series cap making a total of 5 caps = 15 amps total.
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The operating frequency is fixed at 6.78 MHz. I'm not tuning the oscillator frequency. I'm tuning the resonant network by adjusting the capacitance to compensate for the production tolerance of the Lf inductors.
The operating frequency is fixed at 6.78 MHz because the system is designed to operate in the ISM band.
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how slow? relay slow?
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The total current in the circuit is 3 A peak.
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Suggestion following @mtwieg #1:
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Does this modulate at a lower freq, or is the 6.7MHz clean ?
The mosfet current will scale by C so you can user smalller fets for lower caps, and you will need to retune the exact caps to get change in C you desire due to fet C effects,
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IMHO it's an unmodulated CW carrier. Except inductive heating it becomes popular in wireless energy transfer. Lf seems to be the transfer coil and the switched capacitors for impedance matching reminding me at an Shortwave Autotuner.
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Spice can show you the current thru each cap, but you might be able to use mosfet SSR to simplify the parts count.
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Yes, this is the operating frequency of a wireless power transfer (WPT) system. 6.78 MHz is one of the most suitable frequencies for systems up to 250 W. It results in less heating of nearby metal objects and allows for a more compact overall design.
In the circuit shown, Lf–Cf is a series filter placed ahead of the transmitting coil. Its purpose is to provide a "clean" sinusoidal waveform to the coil, thereby reducing the radiated harmonic content.
The Lf element is an inductor wound on a T50-2 toroidal core. The system is extremely sensitive to its inductance value. A deviation of as little as ±1% can change the input power enough to either reduce the power delivered to the receiver or cause an overcurrent condition in the transmitter.
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Judging by the small adjustment caps, you don't need a lot of adjustment range.
So you could perhaps tune the inductance, with a separate dc driven winding to give some control over core permeability.
Would need some experimenting though.
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Suggestion following @mtwieg #1:
That #8 example of PV isolator driving two FETS looks good.
Spice suggests currents are 79mA ~ 390mA RMS for each cap, for a 3.5A peak path.
Maybe a telecom type SSR like the xx214 or xx274 series is good enough for the 79mA leg, but the higher currents may be better with PV isolator, and FETS as shown in #8
OptoPV drivers like GAQV1122S GAQV1123S are ~ 30c, so they manage floating gate drive.
FET selection is a trade off between loss when ON due to Rds, and isolation and distortion when 'OFF', due to Coss Crss size and variations.
Some bench testing may be needed, as not all FETS have spice models.
lcsc have NH FETS in TO252 : NPS1N60S 3.3c NPS2N60S 3.7c NPS4N60S 8.3c - low Coss Crss and low cost 600V FETS.
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If the nominal resonant frequency with 350nH & 2.32nf is supposed to be 6.7MHz there is a slight discrepancy as the nominal values give 5.58MHz?
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That #8 example of PV isolator driving two FETS looks good.
Spice suggests currents are 79mA ~ 390mA RMS for each cap, for a 3.5A peak path.
Maybe a telecom type SSR like the xx214 or xx274 series is good enough for the 79mA leg, but the higher currents may be better with PV isolator, and FETS as shown in #8
Telecom relays like AQW212 might be viable. Ron=2.5ohm, max continuous load current 0.5Arms, Coff around 80pF. Not sure if that much Ron is acceptable for the application. If not, then a discrete SSR with GaN FETs is probably the way to go. For example, EPC2110 has Ron=0.16ohm, Imax=3Arms, Coff=125pF.
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Thank you for your comments.
The inductance of the package leads is also a critical parameter, so the TO-220 package is not the most suitable choice.
The NPS4N60S has an RDS(on) of about 3 Ω. With an average current of 300 mA, this results in approximately 1 W of conduction loss. For four channels, that would amount to about 4 W, reducing the overall system efficiency by at least 5%.
The STD11N60DM2 appears to be a better option; however, it is also only available in the TO-252 package.
Among dual MOSFETs, I found the EPC2221. However, at around $2 per device in small quantities, it would increase the BOM cost by at least $8, which is about 16% of the target product cost.
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In this case, the Lf–Cf network is part of the LCC compensation used in a wireless power transfer system. Its natural resonant frequency may be lower than the operating frequency.
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The mosfet isn't a bidirectional switch, its body diode is on for every half cycle whatever the mosfets gate voltage happens to be.
To get bipolar unidirectional switching you'd need four mosfets per switch. Expensive and messy.
Then you've got the large inter-electrode capacitances to ruin your day.
A low cost DDS ic and a small class E amplifier using a single mosfet solves all that, no?
A bit of self tuning code determines maximum power transfer.
Lovely.
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The inductance of the package leads is also a critical parameter, so the TO-220 package is not the most suitable choice.
Why? If the signal is very narrowband (sounds like it is) then any parasitic inductance would just get absorbed into the reset of the circuit. In this case it would effectively cause each of those switched capacitors to appear as a somewhat higher capacitance. But then you have the tuner to compensate for it.
Among dual MOSFETs, I found the EPC2221. However, at around $2 per device in small quantities, it would increase the BOM cost by at least $8, which is about 16% of the target product cost.
I think you need to adjust your expectations here...
To get bipolar unidirectional switching you'd need four mosfets per switch. Expensive and messy.
Bipolar unidirectional switch...?
A low cost DDS ic and a small class E amplifier using a single mosfet solves all that, no?
A bit of self tuning code determines maximum power transfer.
I'm betting there are multiple resonators in the system whose frequencies must match precisely for good power transfer. In such a case, if the resonators are off then there won't exist any operating frequency with good transfer efficiency.
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The inductance of the package leads is also a critical parameter, so the TO-220 package is not the most suitable choice.
The NPS4N60S has an RDS(on) of about 3 Ω. With an average current of 300 mA, this results in approximately 1 W of conduction loss. For four channels, that would amount to about 4 W, reducing the overall system efficiency by at least 5%.
These are simple on/ off switches, inductance may matter more on the main power switching device.
What matters the most in the spice runs I tried, was capacitance linearity.
The loss is not the same in all legs as the current varies, and you may want to revisit your power maths too… 8)
Addit: you may need more than one fet part code, if you want to lower power loss and keep linearity.
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Someone suggested that, because the MOSFETs switch very infrequently, I could avoid using an isolated floating gate driver and instead drive the gates through a PI network (capacitor – large resistor – capacitor) referenced to the floating source potential.
1. Does this approach make sense for this application?
Going back to this question, it’s a little hairy, but you could try it.
The caps will DC restore with the fet diode when off, which will give a current impulse when turned on.
Given these are switched infrequently and are fractional caps, maybe that is tolerable?
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Spice gives some revealing results for this interesting challenge.
This shows a PhotoPV driving dual-fets, and there is also a RC to gate single fet.
Slow gate drive can keep current peaks down, but there are peak powers during the switch over times, that need to be watched.
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Yeah it's hard to tell if the high power dissipation during switching will be an issue.
There are ways to make the drive much faster (but requires additional phototransistors), see fig 6A here: https://patents.google.com/patent/US12130345B2/en?oq=US12130345
Even with an advanced drive method like that, I would still rather not hot-switch.
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tl;dr
Funny, getting a patent on a circuit design, which is establihed approx 30 years before. Keithley uses the scheme acc to fig. 6a 1:1 in its 6485 picoammeter. Since mid '90. It is part of the FB or range switch.
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Where can I find that 6485 schematic?
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Only the input amplifier section is available. It comes from a dedicated EEVblog member who has put an enormous amount of effort into reverse engineering it.
I’ll have to look for it –
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On first page of this thread, posted by @razberik the third reply from bottom(!)
Without his work an repair would be near impossible. Many thanks! :)
https://www.eevblog.com/forum/testgear/keithley-64856487-teardown/ (https://www.eevblog.com/forum/testgear/keithley-64856487-teardown/)
https://www.eevblog.com/forum/testgear/keithley-64856487-teardown/?action=dlattach;attach=289147 (https://www.eevblog.com/forum/testgear/keithley-64856487-teardown/?action=dlattach;attach=289147)
It matches near 100% with my PCB.
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Funny, getting a patent on a circuit design, which is establihed approx 30 years before. Keithley uses the scheme acc to fig. 6a 1:1 in its 6485 picoammeter. Since mid '90. It is part of the FB or range switch.
That looks like fig 5 from the patent (turn-off is fast, but turn-on is still slow). Certainly wouldn't be surprised if someone had also come up with the fig 6a circuit too, though.
It's super easy to get a patent granted, even if prior art exists. Defending a challenge from the prior art, on the other hand...
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Thanks for the schematic.
The second circuit with a single transistor would still require an isolated gate driver, since the LfCf network is not referenced to ground (GND).
[attach=2]
The use of two transistors is justified, as it turns out, by the bipolar drive signal.
A switching time of 10 ms should be sufficient.
Moreover, the switching occurs only once when the system is powered on.
What concerns me more is the power dissipation in the OFF state (0.8 W per channel), which, as I understand it, is caused by the Miller capacitance.
[attach=1]
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What concerns me more is the power dissipation in the OFF state (0.8 W per channel), which, as I understand it, is caused by the Miller capacitance.
Where do you see 0.8W of dissipation...? When running the simulation, I see average dissipation of M1 and M2 in the off state of about 1.5mW each.
The only way miller capacitance could factor into dissipation is if it couples enough RF so much RF from drain to gate that Vgs starts getting close to Vth. This can be avoided just by adding additional gate-source capacitance.
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What concerns me more is the power dissipation in the OFF state (0.8 W per channel), which, as I understand it, is caused by the Miller capacitance.
0.8W :-//
The off state ‘power’ numbers need a little care, as that is reactive energy.
You already need a low off current in order to get the effective capacitance changes you want.
Off current is the way you will calculate the effective average fet cap effect.
That’s one reason I’m not sure a single fet choice can do all legs, you will need to do some bench tests on many candidates and beware a simple part code can vary a lot across Asian vendors.
Pick part code and vendor.
Do you have a good MHz rms ac current meter ?
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The use of two transistors is justified, as it turns out, by the bipolar drive signal.
A switching time of 10 ms should be sufficient.
You should be well under that. Typical sim times are 200us ballpark, and that’s with a lowest cost pv opto, you can pay more for better performance.
As you chase lowest fet coss, gate c will naturally be low.
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Yes, you're right. I was misinterpreting the values reported by LTspice. The average power over one cycle is about 2 mW. I believe these losses are associated with the Miller capacitance, since I can see oscillations at the operating frequency on the gate node. In any case, the losses are negligible.
[attach=1]
By effective capacitance, do you mean the capacitance that contributes to the total Cf because there is some current flowing through the branch when the MOSFET is off? Are we talking about something on the order of only a few percent of the branch capacitance?
If so, that is not particularly critical in my application, because the value of Cf does not affect the efficiency—it only changes the delivered output power. For the most part, controlling Cf to within about ±30 pF is sufficient.
For the measurements, I have a high-frequency current probe for my oscilloscope.
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By effective capacitance, do you mean the capacitance that contributes to the total Cf because there is some current flowing through the branch when the MOSFET is off? Are we talking about something on the order of only a few percent of the branch capacitance?
That's why I recorded currents for SW off and SW on states.
The off-state current shows the effective off C, which can be significant.
You can select FETS with lower Coff numbers, but they usually have higher RDS and thus higher power loss when ON.
I suspect you may need 2 or perhaps 3 part codes to cover ON:OFF ratio with reasonable power loss and also your 100:560pF ranges.
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Back to the original question of whether it's feasible to use a non-galvanically isolated driver, I've attached an LTspice simulation showing a somewhat reasonable implementation. I removed the inductor and replaced the RF drive with a 3A current source. I added some .meas statements to automatically measure the dissipation of components M1, M2, R1, and R2 in both the on and off states.
The most important factor in making this setup work is keeping the DC bias of the switch (the source node SA) at GND (or whatever the gate control signal ctrl is referenced to). To help meet that criteria, the capacitor C1 is split into two (C1_1 and C1_2, each with double the original value), with the switch in between the two halves. This ensures that there's no DC path on either side. R1 and R2 are chosen to compromise switching speed with power dissipation.
For the first 1ms of the simulation (500us off, 500us on), things work well. R1 and R2 dissipate a few milliwatts each, and the switching time is around 100-200us.
After 1ms, a confounding issue is introduced: the voltage sources Vcm1 and Vcm2 create bipolar pulses on the output side. This injects charge into the switch circuit, and is enough to actually cause Vgs to cross the threshold of the FETs, leading to the switch changing state unintentionally. Even though these disturbances technically are AC, their duration is long enough that the criteria for zero DC bias on the switch is momentarily violated. We would also see a similar effect if the common mode disturbance were applied to the control signal source Vctrl.
Now this may seem like a contrived situation, there's no way such a disturbance could happen in a real application. Well, who knows, it depends on the circuitry surrounding the switch circuit itself.
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Thank you @mtwieg for this circuit. So far, it is the best solution in terms of simplicity and cost. The price of photovoltaic isolators starts at around $2 each, so implementing the automatic tuning solution with them would increase the cost by approximately $10–15, which is nearly 30% of the total cost of the generator.
As for the pulses from the Vcm1 and Vcm2 sources, they cannot occur in our system.
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reed relays, not FET
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